公开(公告)号：WO2009155352A3

公开(公告)日：2010-03-25

申请号：PCT/US2009047675

申请日：2009-06-17

Applicant: LAM RES CORP ,  LEMING ANDRES ,  KUTHI ANDRAS ,  ANDERSON THOMAS

Inventor： LEMING ANDRES ,  KUTHI ANDRAS ,  ANDERSON THOMAS

IPC: H05H1/36 ,  H01L21/205 ,  H01L21/3065

CPC classification number: H03B21/00

Abstract: A complex waveform frequency matching device is disclosed. In various embodiments, the matching device comprises a plurality of radio frequency generators coupled in parallel with one another. Each subsequent one of the plurality of radio frequency generators is configured to produce a harmonic frequency related by an integral multiple to a frequency produced by any lower-frequency producing radio frequency generator, thereby generating a complex waveform. A plurality of frequency splitter circuits is coupled to an output of the plurality of radio frequency generators, and each of a plurality of matching networks has an input coupled to an output of one of the plurality of frequency splitter circuits and an output configured to be coupled to a plasma chamber.

Abstract translation: 公开了一种复杂的波形频率匹配装置。 在各种实施例中，匹配装置包括彼此并联耦合的多个射频发生器。 多个射频发生器中的后续一个被配置为产生与由任何较低频产生的射频发生器产生的频率的整数倍相关的谐波频率，从而产生复合波形。 多个分频器电路耦合到多个射频发生器的输出，并且多个匹配网络中的每一个具有耦合到多个分频器电路之一的输出的输入和被配置为耦合的输出 到等离子体室。

公开(公告)号：WO2007038030A2

公开(公告)日：2007-04-05

申请号：PCT/US2006036139

申请日：2006-09-15

Applicant: LAM RES CORP ,  YOON HYUNGSUK ALEXANDER ,  BOYD JOHN ,  KUTHI ANDRAS ,  BAILEY III ANDREW D

Inventor： YOON HYUNGSUK ALEXANDER ,  BOYD JOHN ,  KUTHI ANDRAS ,  BAILEY III ANDREW D

IPC: H01L21/302 ,  G03C1/00 ,  H01L21/461

CPC classification number: H01L21/02087 ,  B08B7/0035

Abstract: An apparatus generating a plasma for removing fluorinated polymer from a substrate is disclosed. The embodiment includes a powered electrode assembly, including a powered electrode, a first dielectric layer, and a first wire mesh disposed between the powered electrode and the first dielectric layer. The embodiment also includes a grounded electrode assembly disposed opposite the powered electrode assembly so as to form a cavity wherein the plasma is generated, the first wire mesh being shielded from the plasma by the first dielectric layer when the plasma is present in the cavity, the cavity having an outlet at one end for providing the plasma to remove the fluorinated polymer.

Abstract translation: 公开了一种从衬底生成用于除去氟化聚合物的等离子体的装置。 该实施例包括动力电极组件，其包括供电电极，第一介电层和设置在电源电极和第一介电层之间的第一丝网。 该实施例还包括与动力电极组件相对设置的接地电极组件，以便形成其中产生等离子体的空腔，当空腔中存在等离子体时，第一电线网被第一介电层与等离子体屏蔽， 空腔在一端具有出口，用于提供等离子体以除去氟化聚合物。

公开(公告)号：WO2004012221A3

公开(公告)日：2004-07-01

申请号：PCT/US0323304

申请日：2003-07-23

Applicant: LAM RES CORP ,  LOHOKARE SHRIKANT P ,  KUTHI ANDRAS ,  BAILEY ANDREW D III

Inventor： LOHOKARE SHRIKANT P ,  KUTHI ANDRAS ,  BAILEY ANDREW D III

IPC: H05H1/46 ,  C23F1/00 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01J37/321 ,  H01J37/32174 ,  H01J37/32431 ,  H01J37/32623

Abstract: An apparatus and method for adjusting the voltage applied to a Faraday shield (112) of an inductively coupled plasma etching apparatus (101) is provided. An appropriate voltage is easily and variably applied to a Faraday shield such that sputtering of a plasma can be controlled to prevent and mitigate deposition of non-volatile reaction products that adversely affect an etching process. The appropriate voltage for a particular etching process or step is applied to the Faraday shield by simply adjusting a tuning capacitor (204, 210, 208, 206). It is not necessary to mechanically reconfigure the etching apparatus to adjust the Faraday shield voltage.

Abstract translation: 提供一种用于调整施加到电感耦合等离子体蚀刻装置（101）的法拉第屏蔽（112）的电压的装置和方法。 适当的电压容易且可变地施加到法拉第屏蔽，使得可以控制等离子体的溅射以防止和减轻不利地影响蚀刻工艺的非挥发性反应产物的沉积。 通过简单地调整调谐电容器（204,210,208,206）将用于特定蚀刻工艺或步骤的适当电压施加到法拉第屏蔽。 不需要机械地重新配置蚀刻装置来调节法拉第屏蔽电压。

公开(公告)号：WO0229849A3

公开(公告)日：2002-06-13

申请号：PCT/US0142536

申请日：2001-10-05

Applicant: LAM RES CORP ,  KUTHI ANDRAS ,  FISCHER ANDREAS

Inventor： KUTHI ANDRAS ,  FISCHER ANDREAS

IPC: H05H1/46 ,  B01J19/08 ,  C23C16/505 ,  H01J37/32 ,  H01L21/205 ,  H01L21/3065

CPC classification number: H01J37/32146 ,  H01J37/32082

Abstract: The present invention provides a system, apparatus, and method for processing a wafer using a single frequency RF power in a plasma processing chamber. The plasma processing system includes a modulated RF power generator, a plasma processing chamber, and a match network. The modulated RF power generator is arranged to generate a modulated RF power. The plasma processing chamber is arranged to receive the modulated RF power for processing the wafer and is characterized by an internal impedance during the plasma processing. The plasma processing chamber includes an electrostatic chuck for holding the wafer in place with the electrostatic chuck including a first electrode disposed under the wafer for receiving the modulated RF power. The plasma processing chamber further includes a second electrode disposed over the wafer. The modulated RF power generates plasma and ion bombardment energy for processing the wafer. The match network is coupled between the modulated RF power generator and the plasma processing chamber to receive and transmit the modulated RF power from the modulated RF power generator to the plasma processing chamber. The match network is further configured to match an impedance of the modulated RF power generator to the internal impedance of the plasma processing chamber.

Abstract translation: 本发明提供了用于在等离子体处理室中使用单频RF功率处理晶片的系统，设备和方法。 等离子体处理系统包括调制RF功率发生器，等离子体处理室和匹配网络。 调制的RF功率发生器被设置为产生调制的RF功率。 等离子体处理室布置成接收用于处理晶片的调制RF功率，并且在等离子体处理期间由内部阻抗表征。 等离子体处理室包括用于将晶片保持就位的静电吸盘，静电吸盘包括设置在晶片下方的第一电极，用于接收调制的RF功率。 等离子体处理室还包括设置在晶片上的第二电极。 调制的RF功率产生用于处理晶片的等离子体和离子轰击能量。 匹配网络耦合在调制的RF功率发生器和等离子体处理室之间，以接收调制的RF功率，并将调制的RF功率从调制的RF功率发生器传送到等离子体处理室。 匹配网络被进一步配置成将调制的RF功率发生器的阻抗匹配到等离子体处理室的内部阻抗。

公开(公告)号：WO9966533A9

公开(公告)日：2001-05-31

申请号：PCT/US9913474

申请日：1999-06-15

Applicant: LAM RES CORP

Inventor： KUTHI ANDRAS ,  LI LUMIN

IPC: H05H1/46 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065

CPC classification number: H01J37/32009 ,  H01J37/32082 ,  H01J37/3244 ,  H01J37/32541

Abstract: Disclosed is a system for processing a semiconductor wafer through plasma etching operations. The system has a process chamber that includes a support chuck for holding the semiconductor wafer and a pair of RF power sources. In another case, the system can be configured such that the electrode is grounded and the pair of RF frequencies are fed to the support chuck (bottom electrode). The system therefore includes an electrode that is positioned within the system and over the semiconductor wafer. The electrode has a center region, a first surface and a second surface. The first surface is configured to receive processing gases from a source that is external to the system and flow the processing gases into the center region. The second surface has a plurality of gas feed holes that are continuously coupled to a corresponding plurality of electrode openings that have electrode opening diameters that are greater than gas feed hole diameters of the plurality of gas feed holes. The plurality of electrode openings are configured to define an electrode surface that is defined over a wafer surface of the semiconductor wafer. The electrode surface assists in increasing an electrode plasma sheath area in order to cause a shift in bias voltage onto the wafer surface, thereby increasing the ion bombardment energy over the wafer without increasing the plasma density.

Abstract translation: 公开了一种通过等离子体蚀刻操作来处理半导体晶片的系统。 该系统具有包括用于保持半导体晶片和一对RF电源的支撑卡盘的处理室。 在另一种情况下，可以将系统配置为使得电极接地，并将一对RF频率馈送到支撑卡盘（底部电极）。 因此，该系统包括位于系统内并在半导体晶片之上的电极。 电极具有中心区域，第一表面和第二表面。 第一表面被配置为从系统外部的源接收处理气体并将处理气体流入中心区域。 第二表面具有多个气体供给孔，其连续地耦合到具有大于多个气体供给孔的气体供给孔直径的电极开口直径的对应的多个电极开口。 多个电极开口被配置为限定限定在半导体晶片的晶片表面上的电极表面。 电极表面有助于增加电极等离子体鞘的面积，以便使晶片表面上的偏置电压发生偏移，从而增加晶片上的离子轰击能量而不增加等离子体密度。

公开(公告)号：IL140277A

公开(公告)日：2004-06-20

申请号：IL14027799

申请日：1999-06-15

Applicant: LAM RES CORP

Inventor： KUTHI ANDRAS ,  LI LUMIN

IPC: H05H1/46 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065

Abstract: Disclosed is an electrode used for processing a semiconductor wafer through plasma etching operations. The electrode is disposed within a process chamber that includes a support chuck for holding the semiconductor wafer and a pair of RF power sources. The electrode has a center region, a first surface and a second surface. The first surface is configured to receive processing gases from a source and to flow the processing gases into the center region. The second surface has a plurality of gas feed holes that are continuously coupled to a corresponding plurality of electrode openings. Electrode opening diameters are greater than gas feed hole diameters. The plurality of electrode openings define an electrode surface that is over a wafer surface. The electrode surface assists in defining an electrode plasma sheath surface area which causes an increase in bias voltage onto the wafer surface, thereby increasing the ion bombardment energy over the wafer without increasing the plasma density.

公开(公告)号：AU2003228799A1

公开(公告)日：2003-11-11

申请号：AU2003228799

申请日：2003-05-01

Applicant: LAM RES CORP

Inventor： HOWALD ARTHUR M ,  KUTHI ANDRAS ,  BAILEY ANDREW D III ,  BERNEY BUTCH

IPC: H05H1/46 ,  C23C16/00 ,  C23C16/50 ,  H01J37/32 ,  H01L21/205 ,  H01L21/306 ,  H01L21/3065 ,  H05H1/00

Abstract: A plasma processing chamber for processing a substrate to form electronic components thereon is disclosed. The plasma processing chamber includes a plasma-facing component having a plasma-facing surface oriented toward a plasma in the plasma processing chamber during processing of the substrate, the plasma-facing component being electrically isolated from a ground terminal. The plasma processing chamber further includes a grounding arrangement coupled to the plasma-facing component, the grounding arrangement including a first resistance circuit disposed in a first current path between the plasma-facing component and the ground terminal. The grounding arrangement further includes a RF filter arrangement disposed in at least one other current path between the plasma-facing component and the ground terminal, wherein a resistance value of the first resistance circuit is selected to substantially eliminate arcing between the plasma and the plasma-facing component during the processing of the substrate.

公开(公告)号：AU1490301A

公开(公告)日：2001-05-30

申请号：AU1490301

申请日：2000-11-14

Applicant: LAM RES CORP

Inventor： BAILEY ANDREW D III ,  SCHOEPP ALAN M ,  SMITH MICHAEL G R ,  KUTHI ANDRAS

IPC: H05H1/46 ,  H01J37/32 ,  H01L21/3065

Abstract: A plasma processing system that includes a temperature management system and method that can achieve very accurate temperature control over a plasma processing apparatus is disclosed. In one embodiment, the temperature management system and method operate to achieve tight temperature control over surfaces of the plasma processing apparatus which interact with the plasma during fabrication of semiconductor devices. The tight temperature control offered by the invention can be implemented with combination heating and cooling blocks such that both heating and cooling can be provided from the same thermal interface.

公开(公告)号：DE69942120D1

公开(公告)日：2010-04-22

申请号：DE69942120

申请日：1999-06-15

Applicant: LAM RES CORP

Inventor： KUTHI ANDRAS ,  LI LUMIN

IPC: H01J37/32 ,  H05H1/46 ,  H01L21/302 ,  H01L21/3065

Abstract: Disclosed is an electrode used for processing a semiconductor wafer through plasma etching operations. The electrode is disposed within a process chamber that includes a support chuck for holding the semiconductor wafer and a pair of RF power sources. The electrode has a center region, a first surface and a second surface. The first surface is configured to receive processing gases from a source and to flow the processing gases into the center region. The second surface has a plurality of gas feed holes that are continuously coupled to a corresponding plurality of electrode openings. Electrode opening diameters are greater than gas feed hole diameters. The plurality of electrode openings define an electrode surface that is over a wafer surface. The electrode surface assists in defining an electrode plasma sheath surface area which causes an increase in bias voltage onto the wafer surface, thereby increasing the ion bombardment energy over the wafer without increasing the plasma density.

公开(公告)号：AT353472T

公开(公告)日：2007-02-15

申请号：AT00982118

申请日：2000-11-14

Applicant: LAM RES CORP

Inventor： BAILEY ANDREW D III ,  SCHOEPP ALAN M ,  HEMKER DAVID J ,  WILCOXSON MARK H ,  KUTHI ANDRAS

IPC: H05H1/46 ,  C23C16/507 ,  H01J37/32 ,  H01L21/205 ,  H01L21/3065

Abstract: A plasma processing system for processing a substrate which includes a single chamber, substantially azimuthally symmetric plasma processing chamber within which a plasma is both ignited and sustained for the processing. The plasma processing chamber has no separate plasma generation chamber. The plasma processing chamber has an upper end and a lower end. The plasma processing system includes a coupling window disposed at an upper end of the plasma processing chamber and an RF antenna arrangement disposed above a plane defined by the substrate when the substrate is disposed within the plasma processing chamber for the processing. The plasma processing system also includes an electromagnet arrangement disposed above the plane defined by the substrate. The electromagnet arrangement is configured so as to result in a radial variation in the controllable magnetic field within the plasma processing chamber in the region proximate the coupling window and antenna when at least one direct current is supplied to the electromagnet arrangement. The radial variation is effective to affect processing uniformity across the substrate. The plasma processing system additionally includes a dc power supply coupled to the electromagnet arrangement. The dc power supply has a controller to vary a magnitude of at least one direct current, thereby changing the radial variation in the controllable magnetic field within the plasma processing chamber in the region proximate the antenna to improve the processing uniformity across the substrate.