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公开(公告)号：DE69029942D1
公开(公告)日：1997-03-27
申请号：DE69029942
申请日：1990-10-16
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： ZAMBRANO RAFFAELE , MAGRO CARMELO
IPC: H01L21/336 , H01L29/10 , H01L29/78 , H01L29/772
Abstract: The process provides first for the accomplishment of low-doping body regions (12) at the sides and under a gate region (15) and then the accomplishment of high-doping body regions (14) inside said low-doping body regions (12) and self-aligned with said gate region (15). There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions (14) self-aligned with said gate region (15) and with a reduced junction depth.
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公开(公告)号：DE69122598D1
公开(公告)日：1996-11-14
申请号：DE69122598
申请日：1991-12-18
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PUZZOLO SANTO , ZAMBRANO RAFFAELE , PAPARO MARIO
IPC: H01L21/8249 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L27/082 , H01L29/73 , H01L29/732 , H01L21/82
Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.
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公开(公告)号：DE69213675D1
公开(公告)日：1996-10-17
申请号：DE69213675
申请日：1992-11-27
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PAPARO MARIO , ZAMBRANO RAFFAELE
Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).
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公开(公告)号：IT1244239B
公开(公告)日：1994-07-08
申请号：IT661090
申请日：1990-05-31
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： ZAMBRANO RAFFAELE , GRIMALDI ANTONIO
IPC: H01L21/8249 , H01L21/76 , H01L27/06 , H01L27/088 , H01L29/78 , H01L
Abstract: By using a diffused insulation region placed around the body region and with deeper junction and hence longer curvature radius than the typical body/drain junction values, in combination with an appropriate layout of the buried drain region underneath the power stage, breakdown voltage is maximized without compromising the Ron series resistance of the power stage and the reliability of the device.
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公开(公告)号：DE69124289D1
公开(公告)日：1997-03-06
申请号：DE69124289
申请日：1991-05-25
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： ZAMBRANO RAFFAELE , GRIMALDI ANTONIO
IPC: H01L21/8249 , H01L21/76 , H01L27/06 , H01L27/088 , H01L29/78 , H01L29/772 , H01L29/06
Abstract: By using a diffused insulation region placed around the body region and with deeper junction and hence longer curvature radius than the typical body/drain junction values, in combination with an appropriate layout of the buried drain region underneath the power stage, breakdown voltage is maximized without compromising the Ron series resistance of the power stage and the reliability of the device.
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Patent Agency Ranking
公开(公告)号：DE69213675T2
公开(公告)日：1997-02-27
申请号：DE69213675
申请日：1992-11-27
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PAPARO MARIO , ZAMBRANO RAFFAELE
Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).
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公开(公告)号：ITMI913265D0
公开(公告)日：1991-12-05
申请号：ITMI913265
申请日：1991-12-05
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PAPARO MARIO , ZAMBRANO RAFFAELE
Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).
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公开(公告)号：DE69519476T2
公开(公告)日：2001-06-28
申请号：DE69519476
申请日：1995-12-07
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： CAPOCELLI PIERO , ZAMBRANO RAFFAELE , PIO FEDERICO , RIVA CARLO
IPC: H01F17/00 , H01F41/04 , H01L23/522 , H01L27/04
Abstract: Inductive structures making highly efficient use of the magnetic flux generated, and being consistent with integrated circuit manufacturing techniques, and a method of making them on a semiconductor substrate concurrently with the formation of the integrated circuit itself.
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公开(公告)号：IT1252623B
公开(公告)日：1995-06-19
申请号：ITMI913265
申请日：1991-12-05
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PAPARO MARIO , ZAMBRANO RAFFAELE
Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).
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公开(公告)号：IT1246759B
公开(公告)日：1994-11-26
申请号：IT2257790
申请日：1990-12-31
Applicant: SGS THOMSON MICROELECTRONICS , CONS RIC MICROELETTRONICA
Inventor： PUZZOLO SANTO , ZAMBRANO RAFFAELE , PAPARO MARIO
IPC: H01L21/8249 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L27/082 , H01L29/73 , H01L29/732 , H01L
Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.
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