公开(公告)号：DE69519476D1

公开(公告)日：2000-12-28

申请号：DE69519476

申请日：1995-12-07

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： CAPOCELLI PIERO ,  ZAMBRANO RAFFAELE ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01F17/00 ,  H01F41/04 ,  H01L23/522 ,  H01L27/04

Abstract: Inductive structures making highly efficient use of the magnetic flux generated, and being consistent with integrated circuit manufacturing techniques, and a method of making them on a semiconductor substrate concurrently with the formation of the integrated circuit itself.

公开(公告)号：DE69519476T2

公开(公告)日：2001-06-28

申请号：DE69519476

申请日：1995-12-07

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： CAPOCELLI PIERO ,  ZAMBRANO RAFFAELE ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01F17/00 ,  H01F41/04 ,  H01L23/522 ,  H01L27/04

Abstract: Inductive structures making highly efficient use of the magnetic flux generated, and being consistent with integrated circuit manufacturing techniques, and a method of making them on a semiconductor substrate concurrently with the formation of the integrated circuit itself.

公开(公告)号：DE69221090T2

公开(公告)日：1998-03-05

申请号：DE69221090

申请日：1992-11-17

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： GHEZZI PAOLO ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: A method for forming thin oxide portions in electrically erasable and programmable read-only memory cells, including the use of the enhanced oxidation effect and the lateral diffusion of heavy doping, for obtaining a tunnel portion whose dimensions are smaller than the resolution of the photolithographic method used.

公开(公告)号：IT1252214B

公开(公告)日：1995-06-05

申请号：ITMI913355

申请日：1991-12-13

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： GHEZZI PAOLO ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01J

Abstract: A method for forming thin oxide portions in electrically erasable and programmable read-only memory cells, including the use of the enhanced oxidation effect and the lateral diffusion of heavy doping, for obtaining a tunnel portion whose dimensions are smaller than the resolution of the photolithographic method used.

公开(公告)号：DE69221090D1

公开(公告)日：1997-09-04

申请号：DE69221090

申请日：1992-11-17

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： GHEZZI PAOLO ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: A method for forming thin oxide portions in electrically erasable and programmable read-only memory cells, including the use of the enhanced oxidation effect and the lateral diffusion of heavy doping, for obtaining a tunnel portion whose dimensions are smaller than the resolution of the photolithographic method used.

公开(公告)号：ITMI913355A1

公开(公告)日：1993-06-14

申请号：ITMI913355

申请日：1991-12-13

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： GHEZZI PAOLO ,  PIO FEDERICO ,  RIVA CARLO

IPC: H01L21/8247 ,  H01J20060101 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

公开(公告)号：FR2772967B1

公开(公告)日：2004-01-02

申请号：FR9716433

申请日：1997-12-18

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： PIO FEDERICO ,  ZATELLI NICOLA ,  SOURGEN LAURENT ,  LISART MATHIEU

IPC: G11C16/02 ,  H01L21/8247 ,  H01L27/02 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C5/00 ,  G06F12/14

公开(公告)号：FR2773266B1

公开(公告)日：2001-11-09

申请号：FR9716882

申请日：1997-12-31

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： PIO FEDERICO ,  PIZZUTO OLIVIER

IPC: H01L21/28 ,  H01L21/822 ,  H01L21/8238 ,  H01L21/8247 ,  H01L27/04 ,  H01L27/092 ,  H01L27/105 ,  H01L27/115 ,  H01L27/088

Abstract: A structure of electronic devices integrated in a semiconductor substrate with a first type of conductivity comprising at least a first HV transistor and at least a second LV transistor, each having a corresponding gate region. Said first HV transistor has lightly doped drain and source regions with a second type of conductivity, and said second LV transistor has respective drain and source regions with the second type of conductivity, each including a lightly doped portion adjacent to the respective gate region and a second portion which is more heavily doped and comprises a silicide layer.

公开(公告)号：FR2773266A1

公开(公告)日：1999-07-02

申请号：FR9716882

申请日：1997-12-31

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： PIO FEDERICO ,  PIZZUTO OLIVIER

IPC: H01L21/28 ,  H01L21/822 ,  H01L21/8238 ,  H01L21/8247 ,  H01L27/04 ,  H01L27/092 ,  H01L27/105 ,  H01L27/115 ,  H01L27/088

Abstract: An IC structure includes a high voltage transistor, having a lightly doped drain region (6), and a low voltage transistor, having source/drain regions (9, 8) with heavily doped silicide layers. A structure of electronic devices integrated in a first conductivity type semiconductor substrate (1) comprising a high voltage transistor, with a lightly doped drain region (6) of second conductivity type, and a low voltage transistor with second conductivity type source (9) and drain (8) regions, each having a lightly doped portion adjacent the gate region (5) and a more heavily doped second portion consisting of a silicide layer. Independent claims are also included for processes for producing the above IC structure.

公开(公告)号：ITMI971167A1

公开(公告)日：1998-11-20

申请号：ITMI971167

申请日：1997-05-20

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： ZATELLI NICOLA ,  PIO FEDERICO ,  VAJANA BRUNO

IPC: H01L21/8247 ,  H01L27/115