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    12.
    发明专利
    未知

    公开(公告)号：DE69422164T2

    公开(公告)日：2000-04-20

    申请号：DE69422164

    申请日：1994-05-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： ROSSI DOMENICO ,  TAHARA HISASHI

    IPC: H01L27/04 ,  H01L21/822 ,  H01L29/78 ,  H01L29/92 ,  H02M3/07

    Abstract: A BiCMOS capacitive charge pump circuit for low supply voltage has a bipolar part, functionally reproducing a basic charge pump circuit and a CMOS part that comprises MOS transistors (M1, M2) functionally connected in parallel with the driving switch toward ground potential (T3) of the charge transfer capacitance (C1) and in parallel with the output diode (T7) for substantially nullifying voltage drops on the respective bipolar components (T3, T7). A special driving circuit (T8, R2, I2), powered at the boosted output voltage (VOUT) responds to the rise of the voltage on the output node above a minimum level, as ensured by the bipolar part of the charge pump circuit, to drive said MOS transistors (M1, M2), thus allowing the output voltage to reach a level that is substantially double the supply voltage (Vs), also when the latter is exceptionally low for reliably ensuring switching of the CMOS part of the circuit.

    14.
    发明专利
    未知

    公开(公告)号：DE69316630D1

    公开(公告)日：1998-02-26

    申请号：DE69316630

    申请日：1993-11-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： ROSSI DOMENICO ,  TANAKA KAZUYUKI

    IPC: H02M3/155 ,  H02M3/158 ,  H02M1/00

    Abstract: A DC-DC boost converter for directly driving a capacitive load employs four switches for cyclically commuting the connection configuration of an energy storing inductor. First and second switches are driven at a relatively high frequency and provide an impulsive charge path of the inductor by connecting one or the other end to a power supply rail. Third and fourth switches are driven in phase opposition to each other at a relatively low frequency and provide a discharge path from one and the other end of the inductor, respectively, toward an output node of the circuit to which the capacitive load is connected.

    15.
    发明专利
    未知

    公开(公告)号：DE69316215D1

    公开(公告)日：1998-02-12

    申请号：DE69316215

    申请日：1993-10-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CORDINI PAOLO ,  PEDRAZZINI GIORGIO ,  ROSSI DOMENICO

    IPC: H03K19/0175

    Abstract: A stage of both input and output configurable for operation with low and high voltages, comprises: first (M1), second (M2) and third (M3) transistors, each having first and second terminals and a control terminal, the first and second terminals and control terminal of the first transistor (M1) being respectively connected to a first terminal of a voltage supply, the first terminal of the second transistor (M2), and a drive circuit means, the second terminal and control terminal of the second transistor (M2) being respectively connected to a circuit node (A), forming an input/output terminal of the stage (1), and to the drive circuit means, the first and second terminals and control terminal of the third transistor (M3) being respectively connected to a second terminal of the voltage supply, the circuit node (A), and the drive circuit means; at least one diode (D2) connected between the first and the second terminal of the second transistor (M2); and an input circuit (3) having a first input terminal connected to the circuit node (A), a second input terminal connected to a reference voltage (Vref3), and at least one output terminal forming an output terminal of the stage (1).

    17.
    发明专利
    未知

    公开(公告)号：DE69316215T2

    公开(公告)日：1998-04-16

    申请号：DE69316215

    申请日：1993-10-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CORDINI PAOLO ,  PEDRAZZINI GIORGIO ,  ROSSI DOMENICO

    IPC: H03K19/0175

    Abstract: A stage of both input and output configurable for operation with low and high voltages, comprises: first (M1), second (M2) and third (M3) transistors, each having first and second terminals and a control terminal, the first and second terminals and control terminal of the first transistor (M1) being respectively connected to a first terminal of a voltage supply, the first terminal of the second transistor (M2), and a drive circuit means, the second terminal and control terminal of the second transistor (M2) being respectively connected to a circuit node (A), forming an input/output terminal of the stage (1), and to the drive circuit means, the first and second terminals and control terminal of the third transistor (M3) being respectively connected to a second terminal of the voltage supply, the circuit node (A), and the drive circuit means; at least one diode (D2) connected between the first and the second terminal of the second transistor (M2); and an input circuit (3) having a first input terminal connected to the circuit node (A), a second input terminal connected to a reference voltage (Vref3), and at least one output terminal forming an output terminal of the stage (1).

    18.
    发明专利
    未知

    公开(公告)号：DE69032087D1

    公开(公告)日：1998-04-09

    申请号：DE69032087

    申请日：1990-12-13

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MURARI BRUNO ,  ROSSI DOMENICO ,  SAVINO PIERANTONIO

    IPC: G11B5/02 ,  H03F3/181 ,  H03F3/343 ,  G11B5/027 ,  H03F3/45

    Abstract: A low-noise preamplifier stage, in particular for magnetic heads, which comprises a differential circuit (T5,T6) and a single-transistor output stage (T2). The differential stage has an intrinsic offset voltage, is ground-connectable and can be directly coupled to the magnetic head (L) , the two transistors forming the differential circuit (T5,T6) having different bias currents in order to reduce the input equivalent noise. The base terminal of the first transistor (T5) of the differential circuit defines an input (IN) of the stage which can be connected directly to a terminal of the magnetic head (L); the other terminal of the head can be connected directly to the ground. The base terminal of the other transistor (T6) of the differential circuit (T5,T6) is connected to the intermediate point of a pair of resistors (R1,R2) which are mutually connected in series between the single transistor of the output stage (T2) and a line at reference voltage. In this manner the differential stage (T5,T6) biases the output with its offset voltage without requiring additional components for this purpose.

    19.
    发明专利
    未知

    公开(公告)号：IT1236927B

    公开(公告)日：1993-04-26

    申请号：IT2281989

    申请日：1989-12-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MURARI BRUNO ,  ROSSI DOMENICO ,  SAVINO PIERANTONIO

    IPC: G11B5/02 ,  G11B5/027 ,  H03F3/181 ,  H03F3/343 ,  H03F3/45 ,  H03F

    Abstract: A low-noise preamplifier stage, in particular for magnetic heads, which comprises a differential circuit (T5,T6) and a single-transistor output stage (T2). The differential stage has an intrinsic offset voltage, is ground-connectable and can be directly coupled to the magnetic head (L) , the two transistors forming the differential circuit (T5,T6) having different bias currents in order to reduce the input equivalent noise. The base terminal of the first transistor (T5) of the differential circuit defines an input (IN) of the stage which can be connected directly to a terminal of the magnetic head (L); the other terminal of the head can be connected directly to the ground. The base terminal of the other transistor (T6) of the differential circuit (T5,T6) is connected to the intermediate point of a pair of resistors (R1,R2) which are mutually connected in series between the single transistor of the output stage (T2) and a line at reference voltage. In this manner the differential stage (T5,T6) biases the output with its offset voltage without requiring additional components for this purpose.

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