公开(公告)号：KR1020140057027A

公开(公告)日：2014-05-12

申请号：KR1020120123624

申请日：2012-11-02

Applicant: 서강대학교산학협력단

Inventor： 이승훈 ,  남상필 ,  김용민

IPC: H03M1/38

CPC classification number: H03M1/38 ,  H03M1/1023 ,  H03M1/18 ,  H03M2201/2233 ,  H03M2201/63

Abstract: The present invention relates to an SAR ADC performing range scaling by processing a signal of a half of a single input signal range by sampling the single input signal in the half of a sampling capacitor. The present invention prevents a voltage loss in a preamplifier and processes the single input signal of a power voltage size in a whole ADC.

Abstract translation: 本发明涉及通过对采样电容器的一半中的单个输入信号进行采样来处理单个输入信号范围的一半的信号来执行范围缩放的SAR ADC。 本发明防止前置放大器中的电压损失并且处理整个ADC中的电源电压大小的单个输入信号。

公开(公告)号：KR101299215B1

公开(公告)日：2013-08-22

申请号：KR1020120025236

申请日：2012-03-12

Applicant: 전자부품연구원

Inventor： 박종범 ,  이성호

IPC: H03M1/38

CPC classification number: H03M1/38 ,  H03M1/1023 ,  H03M2201/2233 ,  H03M2201/63 ,  H03M2201/8152

Abstract: PURPOSE: A method for correcting a capacitor mismatch and an analog-to-digital converter (ADC) using thereof are provided to correct a mismatch between capacitors regardless of the bit numbers of a lower bit and an upper bit. CONSTITUTION: An ADC comprises a capacitor array unit (100) and a correction unit (400). The capacitor array unit includes a separable weighting capacitor having a first end connected to a left unit capacitor row and a second end connected to a right capacitor row; and a correction capacitor connected directly between the first end and a ground terminal the separable weighting capacitor. The capacitor array unit collects a sample of differences between a first reference voltage and an analog input voltage using the right unit capacitor row and the left unit capacitor row in a capacitor mismatch mode. The correction unit determines whether a capacitor mismatch occurs or not based on a digital signal, and changes capacitance of the correction capacitor if the capacitor mismatch occurs.

Abstract translation: 目的：提供一种用于校正电容器失配的方法和使用其的模数转换器（ADC），以校正电容器之间的失配，而与低位和高位的位数无关。 构成：ADC包括电容器阵列单元（100）和校正单元（400）。 电容器阵列单元包括可分离加权电容器，其具有连接到左单元电容器行的第一端和连接到右电容器行的第二端; 以及直接连接在第一端和接地端子之间的可分离加权电容器的校正电容器。 电容器阵列单元使用正确的单位电容器行和左单位电容器行以电容器失配模式收集第一参考电压和模拟输入电压之间的差异样本。 校正单元基于数字信号确定是否发生电容器失配，并且如果发生电容器失配则改变校正电容器的电容。

公开(公告)号：KR20120021021A

公开(公告)日：2012-03-08

申请号：KR20100085037

申请日：2010-08-31

Applicant: UNIV SOGANG IND UNIV COOP FOUN

Inventor： LEE YONG MIN ,  LEE KYE SHIN

IPC: H03M1/66

CPC classification number: H03M1/1023 ,  H03M1/66 ,  H03M2201/62 ,  H03M2201/63 ,  H03M2201/8152

Abstract: PURPOSE: A digital to analog converter for revising mismatch between capacitors is provided to reduce error possibility in a display output by revising errors due to mismatch between capacitors. CONSTITUTION: A DAC(Digital To Analog Converter) is composed of three capacitors(C1,C2,C3) with the same capacity as one operational amplifier(10) and switches(S1-S9). The operational amplifier includes a first input terminal, a second input terminal, and an output terminal. The second input terminal is connected to a ground terminal. A second capacitor and a third capacitor are used to revise mismatch between capacitors. The first capacitor, the second capacitor, the third capacitor, and the operational amplifier are differently connected for sampling and mismatch correction according to a turn on and off operation of the switch.

Abstract translation: 目的：提供用于修改电容器之间不匹配的数模转换器，通过修改由于电容器之间的不匹配造成的误差，可以减少显示输出中的错误可能性。 构成：DAC（数模转换器）由三个电容（C1，C2，C3）组成，与一个运算放大器（10）和开关（S1-S9）的容量相同。 运算放大器包括第一输入端，第二输入端和输出端。 第二输入端子连接到接地端子。 使用第二电容器和第三电容器来修正电容器之间的失配。 根据开关的接通和断开操作，第一电容器，第二电容器，第三电容器和运算放大器被不同地连接用于采样和不匹配校正。

公开(公告)号：KR1020050088776A

公开(公告)日：2005-09-07

申请号：KR1020040014238

申请日：2004-03-03

Applicant: 매그나칩 반도체 유한회사

Inventor： 우승준

IPC: H03M1/34

CPC classification number: H03M1/1245 ,  H03M1/0617 ,  H03M2201/6107 ,  H03M2201/63 ,  H03M2201/65

Abstract: 본 발명은 아날로그/디지탈 변환 장치에 관한 것으로써, 특히, SOC(System-On-Chip) 구조에 포함되는 아날로그/디지탈 변환기에서 데이타 샘플링 시점의 전후 데이타를 프리 샘플링하여 출력되는 디지탈 변환값을 정확히 제어할 수 있도록 하는 기술을 개시한다. 이를 위해, 본 발명은 긴 주기를 가지는 디지탈 데이타를 프리 샘플링하여 저장하고 저장된 프리 샘플링 데이타의 연속성 성향을 확인하여 데이타의 유효성을 판단하며, 샘플링된 디지탈 데이타의 평균값과 유효한 프리 샘플링 데이타 값을 비교함으로써 최종적으로 출력되는 디지탈 데이타의 최하위 비트의 정확도를 향상시킬 수 있도록 한다.

公开(公告)号：KR1020000015023A

公开(公告)日：2000-03-15

申请号：KR1019980034705

申请日：1998-08-26

Applicant: 현대반도체 주식회사

Inventor： 이상대

IPC: H03M1/12

CPC classification number: H03M1/0617 ,  H03M2201/63

Abstract: PURPOSE: An analog/digital converter is provided to improve a reliability by compensating output data with an ideal value. CONSTITUTION: An analog/digital conversion control part(10) outputs a control signal for determining an operating bit number of an analog/digital converter. An input voltage detecting part detects an input voltage of an analog signal according to the control signal, and a reference voltage detecting part selectively outputs a value of a reference voltage as an analog signal to output data as a digital signal thus converted. A comparison part(50) compares the input voltage and the reference voltage to output the output data of a digital signal, and a storage part(60) stores the output signal converted into the digital signal via the comparison part, and an output data compensation part(80) compensates the output data stored in the storage part according to a specific program. The analog/digital converter comprises a select part(90) which selects either one of the output data of the storage part and the compensated output data according to the control signal and outputs the selected output data into an internal data bus.

Abstract translation: 目的：提供模拟/数字转换器，通过以理想值补偿输出数据来提高可靠性。 构成：模拟/数字转换控制部件（10）输出用于确定模拟/数字转换器的操作位数的控制信号。 输入电压检测部根据控制信号检测模拟信号的输入电压，基准电压检测部选择性地输出作为模拟信号的基准电压的值作为被转换的数字信号输出到数据。 比较部分（50）比较输入电压和参考电压以输出数字信号的输出数据，并且存储部分（60）经由比较部分存储转换成数字信号的输出信号，并且输出数据补偿 部分（80）根据具体程序补偿存储在存储部分中的输出数据。 模拟/数字转换器包括根据控制信号选择存储部分的输出数据和补偿的输出数据中的任一个的选择部分（90），并将选择的输出数据输出到内部数据总线。

公开(公告)号：KR1020150041703A

公开(公告)日：2015-04-17

申请号：KR1020130119895

申请日：2013-10-08

Applicant: 현대모비스 주식회사

Inventor： 권순근

IPC: H03M1/06 ,  H03M1/12

CPC classification number: H03M1/0621 ,  H03M1/1023 ,  H03M1/12 ,  H03M2201/192 ,  H03M2201/615 ,  H03M2201/63

Abstract: 본발명은차량용배터리센서의전압채널자기보정장치및 방법에관한것으로서, 본발명에따른차량용배터리센서의전압채널자기보정장치는보정과정에서보정누락또는보정오류가발생하는것을방지하는것을특징으로한다. 본발명에따르면, 차량용배터리센서의전압채널에대해자기보정을행함으로써차량용배터리센서의정확도를유지할수 있고, 특히차량용배터리센서가스스로자기보정을행할수 있도록하여공정에서이루어지는전압보정공정을생략할수 있어서공정을단순화할수 있는이점이있다.

Abstract translation: 根据本发明，进行电池传感器的电压通道的校准，以保持车辆用电池的传感器的精度。 特别地，车辆用电池传感器可以自行校准，从而可以跳过在该过程中执行的电压补偿过程。 最后，可以简化该过程的优点。

公开(公告)号：KR101012741B1

公开(公告)日：2011-02-09

申请号：KR1020090121902

申请日：2009-12-09

Applicant: 경상대학교산학협력단

Inventor： 정세교

IPC: H03M1/64

CPC classification number: H03M1/1023 ,  H03M1/645 ,  H03M2201/2372 ,  H03M2201/615 ,  H03M2201/63

Abstract: PURPOSE: A resolver digital converter and a method compensating phase thereof are provided to compensate a position measurement error due to phase delay by compensating the phase the output signal from a resolver. CONSTITUTION: A resolver(110) detects an output signal which is changed according to the angular displacement of a rotor. A sinusoidal wave generator(120) generates sinusoidal wave to apply created sinusoidal wave to the resolver. A current amplifier(130) amplifies the current of the created sinusoidal wave and applies it to the resolver. A phase compensator(140) generates a phase compensation signal to make the phase of the created sinusoidal wave same as the phase of the signal outputted from the resolver. A resolver digital conversion circuit(150) converts the phase information of the resolver into a digital signal by using the creased phase compensation signal and the outputted signal from the resolver.

Abstract translation: 目的：提供一个分解数字转换器及其补偿相位的方法，通过补偿来自旋转变压器的输出信号的相位来补偿相位延迟引起的位置测量误差。 构成：解算器（110）检测根据转子的角位移而改变的输出信号。 正弦波发生器（120）产生正弦波以将产生的正弦波施加到旋转变压器。 电流放大器（130）放大产生的正弦波的电流并将其施加到旋转变压器。 相位补偿器（140）产生相位补偿信号，以使所生成的正弦波的相位与从旋转变压器输出的信号的相位相同。 解算器数字转换电路（150）通过使用折线相位补偿信号和来自旋转变压器的输出信号将解算器的相位信息转换为数字信号。

公开(公告)号：KR1020060131395A

公开(公告)日：2006-12-20

申请号：KR1020050051818

申请日：2005-06-16

Applicant: 한국과학기술원

Inventor： 조규형 ,  김이경 ,  곽태우 ,  이광찬 ,  김성은

IPC: H03M1/70

CPC classification number: H03M1/1023 ,  H03M1/662 ,  H03M1/70 ,  H03M2201/63 ,  H03M2201/8152

Abstract: An MDAC circuit capable of correcting a gain error of residual voltage and a sample/hold circuit are provided to correct the gain error of the residual voltage due to insufficient gain of an operation amplifier by using a variable capacitor. An MDAC(Multiplying Digital/Analog Converter) circuit includes a sampling capacitor(Cs), a feedback capacitor(Cf), and an operation amplifier(OPA). A gain compensation unit is connected in parallel with the sampling capacitor. The gain compensation unit samples an analog input signal at a sampling phase, and is connected to plural reference voltages at an amplifying phase, thereby compensating a gain of the operation amplifier. A switching member is switched according to a switch control signal input from an exterior.

Abstract translation: 提供能够校正残余电压的增益误差的MDAC电路和采样/保持电路，以通过使用可变电容器来校正由于运算放大器的增益不足引起的残余电压的增益误差。 MDAC（乘法数字/模拟转换器）电路包括采样电容器（Cs），反馈电容器（Cf）和运算放大器（OPA）。 增益补偿单元与采样电容并联。 增益补偿单元以采样相位采样模拟输入信号，并以放大相连接到多个参考电压，从而补偿运算放大器的增益。 根据从外部输入的开关控制信号来切换开关构件。

公开(公告)号：KR1020060119242A

公开(公告)日：2006-11-24

申请号：KR1020050041928

申请日：2005-05-19

Applicant: 최중호 ,  한국전자통신연구원

Inventor： 최중호

IPC: H03M5/12

CPC classification number: H03M5/12 ,  H03M2201/2233 ,  H03M2201/4155 ,  H03M2201/63

Abstract: A frequency tuning circuit of a continuous-time analog filter using an SAR(Successive Approximation Register) scheme is provided to complete frequency tuning efficiently in a short time even at a high tuning resolution by generating a tuning code of an integrator used in the frequency tuning circuit by using the SAR scheme. A frequency tuning circuit of a continuous-time analog filter of an active-RC type generates a frequency tuning code by using an SAR(Successive Approximation Register) scheme. A frequency tuning code generator determines a code of each bit in sequence as decreasing binary weight starting from an uppermost bit. The frequency tuning time takes as long as N clock periods.

Abstract translation: 提供使用SAR（逐次近似寄存器）方案的连续时间模拟滤波器的频率调谐电路，通过生成用于频率调谐的积分器的调谐码，即使在高调谐分辨率下也能在短时间内有效地完成频率调谐 电路采用SAR方案。 有源RC型连续时间模拟滤波器的频率调谐电路通过使用SAR（连续近似寄存器）方案产生频率调谐码。 频率调谐码发生器根据从最高位开始减少的二进制加权，依次确定每个比特的码。 频率调谐时间需要N个时钟周期。

公开(公告)号：KR1020060112435A

公开(公告)日：2006-11-01

申请号：KR1020050034888

申请日：2005-04-27

Applicant: 에스케이하이닉스 주식회사

Inventor： 이기원 ,  박기천

IPC: H01L27/04

CPC classification number: H03M1/0845 ,  H03M1/18 ,  H03M2201/63

Abstract: A semiconductor device is provided to compensate for fluctuation of a power supply voltage in a broader region by digitizing information regarding fluctuation of a power supply voltage while using an ADC(analog-to-digital converter) and by decoding the digitized value and selecting a transistor block suitable for a level of a corresponding power supply voltage. An ADC unit(20) receives a power supply voltage and outputs N-bit digital words(N is a natural number) corresponding to the level of the power supply voltage. A decoding unit(30) decodes the N-bit digital words to output M-bit block selection signals(M is 2^N). A plurality of compensation blocks(40) are selectively enabled according to each bit of the block selection signals. A low pass filter(10) removes a noise component from the power supply voltage to apply the noise-removed power supply voltage to the ADC unit.

Abstract translation: 提供一种半导体器件，以通过在使用ADC（模数转换器）的同时数字化关于电源电压的波动的信息并通过解码数字化值并选择晶体管来补偿较宽区域中的电源电压的波动 块适用于相应电源电压的电平。 ADC单元（20）接收电源电压并输出与电源电压电平对应的N位数字字（N为自然数）。 解码单元（30）对N位数字字进行解码以输出M位块选择信号（M为2 ^ N）。 根据块选择信号的每个位选择性地使能多个补偿块（40）。 低通滤波器（10）从电源电压中去除噪声分量，以将噪声消除的电源电压施加到ADC单元。