公开(公告)号：KR1020020014522A

公开(公告)日：2002-02-25

申请号：KR1020000047857

申请日：2000-08-18

Applicant: 매그나칩 반도체 유한회사

Inventor： 최훈배

IPC: H03M1/12

CPC classification number: H03M1/38 ,  H03M1/164 ,  H03M2201/65

Abstract: PURPOSE: An analog-digital converter of a successive approximation register(SAR) type capable of error correction and an error correction method are provided, which can detect an error of an upper bit and can correct the error of the upper bit. CONSTITUTION: The analog-digital converter includes a comparator, a SAR register(200), a control part and a DAC(Digital-Analog Converter). And it further includes a correction control part(220) which determines the correction as to the first conversion result in response to the other bits(SAR£1:N-1|) excepting an MSB(Most Significant Bit) of the SAR register after the first conversion operation, and outputs a correction enable signal(CORRECTION ENABLE) and the fist and the second correction control signal(INC,DEC) to the SAR register according as whether to correct. The SAR register can subtract or add a weighted value of an LSB(Least Significant Bit) to the value of the SAR register in response to the first and the second correction control signal.

Abstract translation: 目的：提供能够进行纠错和纠错方法的逐次逼近寄存器（SAR）类型的模拟数字转换器，可以检测高位的误差，并能校正高位误差。 构成：模数转换器包括比较器，SAR寄存器（200），控制部分和DAC（数模转换器）。 并且其还包括校正控制部分（220），其响应于除了SAR寄存器的MSB（最高有效位）之后的其它位（SAR£1：N-1 |），确定关于第一转换结果的校正。 第一转换操作，并且根据是否校正，向SAR寄存器输出校正使能信号（CORRECTION ENABLE）和第一和第二校正控制信号（INC，DEC）。 响应于第一和第二校正控制信号，SAR寄存器可以减去或添加LSB（最低有效位）的加权值到SAR寄存器的值。

公开(公告)号：KR1020110040499A

公开(公告)日：2011-04-20

申请号：KR1020090097793

申请日：2009-10-14

Applicant: 삼성전기주식회사

Inventor： 장복현 ,  양창수 ,  류승훈

IPC: H03M1/10

CPC classification number: H03M1/1038 ,  H03M1/12 ,  H03M2201/6164 ,  H03M2201/63 ,  H03M2201/65

Abstract: PURPOSE: A method for calibrating the gain and offset of an analog/digital converter is provided to correct input and output data by correcting the gain and offset of the analog/digital converter. CONSTITUTION: A plurality of preset signals are transmitted from a signal source(10) to a data collecting device(20) and a data operating device(30). The data collecting device transmits the processed signal to the data operating device by processing the preset signal. The preset signal transmitted from the signal source is stored in the data operating device. The gain and offset of the analog/digital converter is operated by comparing the preset signal with the transmitted signal. The gain and offset is transmitted to the data collecting device. The gain and offset of the analog/digital converter is changed into the gain and offset operated by the data operating device.

Abstract translation: 目的：提供一种用于校准模拟/数字转换器的增益和偏移量的方法，以通过校正模拟/数字转换器的增益和偏移来校正输入和输出数据。 构成：从信号源（10）向数据收集装置（20）和数据操作装置（30）发送多个预设信号。 数据采集​​装置通过处理预设信号将经处理的信号发送到数据操作装置。 从信号源发送的预设信号存储在数据操作装置中。 模拟/数字转换器的增益和偏移通过将预设信号与发送信号进行比较来进行操作。 增益和偏移被传送到数据采集装置。 模拟/数字转换器的增益和偏移量由数据操作装置改变为增益和偏移量。

公开(公告)号：KR1020080107736A

公开(公告)日：2008-12-11

申请号：KR1020070055915

申请日：2007-06-08

Applicant: 연세대학교 산학협력단

Inventor： 강성호

IPC: H03M1/10

CPC classification number: H03M1/1071 ,  H03M1/1033 ,  H03M2201/11 ,  H03M2201/65

Abstract: A method and an apparatus for built-in self test in an analog-digital converter are provided to prevent distortion of a test result by distinguishing unnecessary transitions generated in a transition section. A lamp signal is generated. The signal is inputted into an analog-digital converter. A transition is sensed by receiving two lower bits among the output of the converter. A static parameter is calculated by detecting integral non-linearity by receiving the sensed transition and two lower bits among the output of the converter. The static parameter is calculated by detecting differential non-linearity by receiving the sensed transition. The failure of the converter is determined by using the calculated static parameter.

Abstract translation: 提供了一种用于在模拟数字转换器中内置自检的方法和装置，以通过区分在过渡部分中产生的不必要的转换来防止测试结果的失真。 产生灯信号。 该信号被输入到模拟数字转换器。 通过在转换器的输出中接收两个较低位来感测转换。 通过在转换器的输出中接收感测到的转换和两个较低位来检测积分非线性来计算静态参数。 通过接收感测到的过渡来检测差分非线性来计算静态参数。 通过使用计算的静态参数确定转换器的故障。

公开(公告)号：KR1020000045539A

公开(公告)日：2000-07-25

申请号：KR1019980062099

申请日：1998-12-30

Applicant: 엘지정보통신주식회사

Inventor： 김길남

IPC: H03M1/66

CPC classification number: H03M1/661 ,  H03M1/0854 ,  H03M2201/65

Abstract: PURPOSE: An error reducing method is provided to enhance the reliability by reducing errors occurring during the quantization process of a D/A converter and using a low pass filter and a decimal calculator. CONSTITUTION: A method comprises the steps of: initializing a counter, a decimal place, an integer place, and a data value(S11); reading digital data to be analog-converted(S16); judging whether data of a designated decimal place of the read data is 1(S21); judging whether data of a designated integer place of a counter value is 1 in case that the data of the designated decimal place is 1(S26); increasing the designated decimal place and the designated integer place by 1 in case that the data of the designated integer place of the counter is 1(S31).

Abstract translation: 目的：提供一种减少误差的方法，通过减少在D / A转换器的量化过程中发生的误差，并使用低通滤波器和十进制计算器来增强可靠性。 构成：一种方法包括以下步骤：初始化计数器，小数位，整数位和数据值（S11）; 读取要进行模拟转换的数字数据（S16）; 判断读取数据的指定小数位数据是否为1（S21）; 在指定小数位的数据为1的情况下判断计数器值的指定整数位的数据是否为1（S26）; 如果计数器的指定整数位的数据为1，则将指定的小数位和指定的整数位增加1（S31）。

公开(公告)号：KR1020000015455A

公开(公告)日：2000-03-15

申请号：KR1019980035382

申请日：1998-08-29

Applicant: 현대반도체 주식회사

Inventor： 최훈배

IPC: H03M1/12

CPC classification number: H03M1/42 ,  H03M1/0604 ,  H03M2201/6107 ,  H03M2201/65

Abstract: PURPOSE: An analog/digital converter is provided to compensate a digital output signal having an error generated by an error of establishing time. CONSTITUTION: An analog/digital converter comprises a comparison part(1), successive approximation register(2), a internal digital/analog converter(3), a timer(5) and an error correction part(6). The comparison part(1) receives an analog input signal, compares the analog input signal with input signal of the other input terminal and generates a digital signal. The successive approximation register(2) receives the output signal of the comparison part(1), stores gradually digital signals from the most significant bit to the least significant bit, and generates the stored signals as digital output signals. The internal digital/analog converter(3) converts the digital signals stored in the successive approximation register(2) to the analog signals according to a base voltage and applies to the other input terminal of the comparison part(1). The timer(5) controls operations of the successive approximation register(2) and the internal digital/analog converter(3). The error correction part(6) receives remained bits except an output signal of the comparison part(1) and the most significant bit stored in the successive approximation register(2), estimates the generation of an error, and increase or decrease the least significant bit, thereby correcting the errors.

Abstract translation: 目的：提供模拟/数字转换器来补偿具有由建立时间的误差产生的误差的数字输出信号。 构成：模拟/数字转换器包括比较部分（1），逐次逼近寄存器（2），内部数字/模拟转换器（3），定时器（5）和纠错部分（6）。 比较部分（1）接收模拟输入信号，将模拟输入信号与另一输入端的输入信号进行比较，并生成数字信号。 逐次逼近寄存器（2）接收比较部分（1）的输出信号，将来自最高有效位的数字信号逐渐存储到最低有效位，并产生存储的信号作为数字输出信号。 内部数字/模拟转换器（3）根据基极电压将存储在逐次逼近寄存器（2）中的数字信号转换为模拟信号，并将其应用于比较部分（1）的另一输入端。 定时器（5）控制逐次逼近寄存器（2）和内部数字/模拟转换器（3）的操作。 误差校正部分（6）接收除了比较部分（1）的输出信号和存储在逐次逼近寄存器（2）中的最高有效位之外的剩余位，估计误差的产生，并且增加或减小最小有效值 位，从而纠正错误。

公开(公告)号：KR1020050088776A

公开(公告)日：2005-09-07

申请号：KR1020040014238

申请日：2004-03-03

Applicant: 매그나칩 반도체 유한회사

Inventor： 우승준

IPC: H03M1/34

CPC classification number: H03M1/1245 ,  H03M1/0617 ,  H03M2201/6107 ,  H03M2201/63 ,  H03M2201/65

Abstract: 본 발명은 아날로그/디지탈 변환 장치에 관한 것으로써, 특히, SOC(System-On-Chip) 구조에 포함되는 아날로그/디지탈 변환기에서 데이타 샘플링 시점의 전후 데이타를 프리 샘플링하여 출력되는 디지탈 변환값을 정확히 제어할 수 있도록 하는 기술을 개시한다. 이를 위해, 본 발명은 긴 주기를 가지는 디지탈 데이타를 프리 샘플링하여 저장하고 저장된 프리 샘플링 데이타의 연속성 성향을 확인하여 데이타의 유효성을 판단하며, 샘플링된 디지탈 데이타의 평균값과 유효한 프리 샘플링 데이타 값을 비교함으로써 최종적으로 출력되는 디지탈 데이타의 최하위 비트의 정확도를 향상시킬 수 있도록 한다.

公开(公告)号：KR1020020058423A

公开(公告)日：2002-07-12

申请号：KR1020000086528

申请日：2000-12-30

Applicant: 에스케이하이닉스 주식회사

Inventor： 윤광호

IPC: H03M1/26

CPC classification number: H03M7/165 ,  H03M1/1023 ,  H03M2201/65

Abstract: PURPOSE: An encoder of an analog/digital device for reinforcing an error correction function is provided to correct an error of an encoder generated by bubbles of a thermal code. CONSTITUTION: A code inspection portion(200) divides inputted thermal codes by units of predetermined sizes and checks a mixed state of codes of 0 and 1. An MSB(Most Significant Bit) encoding portion(210) performs an encoding process for MSB according to an output result of the code inspection portion(200). A switching portion(220) switches the thermal codes to an LSB(Least Significant Bit) bus in response to an output result of the MSB encoding portion(210). A counting portion(230) is connected with the LSB bus in order to count a code of '1' loaded in the LSB bus. An adder portion(240) adds a result of the MSB encoding portion(210) to an output of the counting portion(230).

Abstract translation: 目的：提供用于加强纠错功能的模拟/数字装置的编码器，以校正由热代码气泡产生的编码器的误差。 代码检查部分（200）按照预定大小的单位划分所输入的热代码，并检查0和1的代码的混合状态。MSB（最高有效位）编码部分（210）根据 代码检查部分（200）的输出结果。 切换部分（220）响应于MSB编码部分（210）的输出结果将热代码切换到LSB（最低有效位）总线。 计数部分（230）与LSB总线连接，以便对在LSB总线中加载的“1”的代码进行计数。 加法器部分（240）将MSB编码部分（210）的结果与计数部分的输出相加。

公开(公告)号：KR1020020022159A

公开(公告)日：2002-03-27

申请号：KR1020000054797

申请日：2000-09-19

Applicant: 삼성전자주식회사

Inventor： 문재준 ,  송민규 ,  조계옥

IPC: H03M1/18

CPC classification number: H03M1/129 ,  H03M1/14 ,  H03M1/205 ,  H03M2201/65

Abstract: PURPOSE: A folding interpolation analog/digital converter is provided to exactly correct an analog signal beyond an input range at a digital output terminal. CONSTITUTION: A reference voltage generator(10) generates a plurality of reference voltages having different levels. A plurality of folders(20) each receives an input analog signal and the plurality of reference voltages and outputs a folding signal. An interpolation section(30) outputs folding signals having an additional intersection of the same intervals based on folding signals generated by two adjacent folders. A comparator(40) compares an output signal of the interpolation section(30) with a reference signal and output a comparison result. An encoder(50) encodes the comparison result and outputs least significant bits. An input range excess detecting folder(60) receives the input analog signal and the reference voltage and outputs an analog input range excess detecting signal and an enable signal. An error correcting section(70) logically combines the analog input range excess detecting signal and enable signal from the input range excess detecting folder(60) and a folding signal and outputs an error correcting signal.

Abstract translation: 目的：提供折叠插补模拟/数字转换器，以精确校正模拟信号超出数字输出端子的输入范围。 构成：参考电压发生器（10）产生具有不同电平的多个参考电压。 多个文件夹（20）各自接收输入模拟信号和多个参考电压并输出折叠信号。 内插部（30）基于由两个相邻的文件夹生成的折叠信号输出具有相同间隔的附加交点的折叠信号。 比较器（40）将插值部（30）的输出信号与基准信号进行比较，并输出比较结果。 编码器（50）对比较结果进行编码并输出最低有效位。 输入范围过量检测文件夹（60）接收输入的模拟信号和参考电压，并输出模拟输入范围过量检测信号和使能信号。 误差校正部（70）逻辑地组合来自输入范围过量检测文件夹（60）的模拟输入范围过量检测信号和使能信号和折叠信号，并输出纠错信号。

公开(公告)号：KR1020080047787A

公开(公告)日：2008-05-30

申请号：KR1020060117666

申请日：2006-11-27

Applicant: 삼성전기주식회사

Inventor： 김병훈 ,  권경수

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M1/1009 ,  H03M1/1071 ,  H03M2201/192 ,  H03M2201/65

Abstract: An apparatus and a method for outputting a linear curve in a digital-to-analog converter are provided to save a time and cost for device development by finding out an optimal SOM operation characteristic for a short time. An apparatus for outputting a linear curve in a digital-to-analog converter includes a linear resistor(130), a linear switch(140), and a decoder(170). The linear resistor is formed by arranging resistors having the same level in series to output a linear waveform. The linear switch is connected to each resistor within the linear resistor and outputs the linear waveform by switching each resistor. The decoder receives and decodes the linear waveform outputted from the linear switch to output the linear waveform to an SOM(Spatial Optical Modulator).

Abstract translation: 提供一种用于在数模转换器中输出线性曲线的装置和方法，以通过在短时间内找出最佳SOM操作特性来节省设备开发的时间和成本。 用于在数模转换器中输出线性曲线的装置包括线性电阻器（130），线性开关（140）和解码器（170）。 线性电阻器通过布置具有相同电平的电阻器来输出线性波形而形成。 线性开关连接到线性电阻中的每个电阻器，并通过切换每个电阻器输出线性波形。 解码器接收并解码从线性开关输出的线性波形，以将线性波形输出到SOM（空间光调制器）。

公开(公告)号：KR1020080046484A

公开(公告)日：2008-05-27

申请号：KR1020060116006

申请日：2006-11-22

Applicant: 삼성전자주식회사

Inventor： 함석헌 ,  이동명 ,  이정환 ,  임승현 ,  한건희

IPC: H03M1/12

CPC classification number: H03M1/1019 ,  H03M1/1023 ,  H03M1/1071 ,  H03M2201/639 ,  H03M2201/64 ,  H03M2201/65

Abstract: An analog-to-digital conversion method is provided to secure a correct analog-to-digital conversion process by modifying upper bits wrongly outputted by parasitic capacitors, a finite voltage gain, noise by a temperature, and a feed-through. An analog-to-digital conversion method includes the steps of: generating a lamp signal corresponding to digital data while changing an upper (N-K) bit of the digital data(S02); comparing a sensed image signal with the lamp signal(S03); determining a value of the upper (N-K) bit of the digital data according to a comparison of the lamp signal and the sensed image signal(S04); generating the lamp signal corresponding to the digital data while changing a lower (K+1) bit of the digital data(S05); comparing a voltage level of the sensed image signal with the sum of the lamp signal and a compensation value(S06); determining a value of a lower K bit of the digital data when the sum of the lamp signal and the compensation value is equal to the voltage level of the sensed image signal(S07); and adjusting the value of the upper (N-K) bit of the digital data according to a most significant 2-bit value of the lower (K+1) bit(S08).

Abstract translation: 提供了一种模数转换方法，用于通过修改由寄生电容器错误输出的高位，有限电压增益，噪声，温度和馈通来确保正确的模数转换过程。 一种模数转换方法包括以下步骤：在改变数字数据的上（N-K）位的同时产生对应于数字数据的灯信号（S02）; 将感测到的图像信号与灯信号进行比较（S03）; 根据灯信号和感测图像信号的比较，确定数字数据的上（N-K）位的值（S04）; 在改变数字数据的较低（K + 1）位的同时，产生与数字数据对应的灯信号（S05）; 将感测图像信号的电压电平与灯信号和补偿值的和进行比较（S06）; 当灯信号和补偿值的总和等于感测图像信号的电压电平时，确定数字数据的较低K位的值（S07）; 并根据较低（K + 1）比特的最高有效2比特值调整数字数据的上（N-K）比特的值（S08）。