公开(公告)号：EP1377141A3

公开(公告)日：2005-10-19

申请号：EP03014334.1

申请日：2003-06-26

Applicant: Nec Tokin Corporation ,  NEC TOPPAN CIRCUIT SOLUTIONS, INC.

Inventor： Nakamura, Hirofumi ,  Arai, Satoshi

IPC: H05K1/16 ,  H01L23/64

CPC classification number: H01L24/81 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/642 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/382 ,  H05K2201/0329 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2203/0315 ,  Y10T428/24917 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A thin type printed circuit board with an enclosed capacitor of a large capacitance. The printed circuit board includes metal sheet 11 having roughed surface presenting micro-irregularities, a dielectric film for capacitor 12 covering the surface of the metal sheet, and a first electrically conductive layer of electrically conductive resin 13 covering the surface of the dielectric film. A second electrically conductive layer 14 is provided on the surface of the first electrically conductive layer in a region of via for cathode side connection 18. The metal sheet and the first and second electrically conductive layers are encapsulated by resin 15. The via for cathode side connection 18, obtained on boring through the resin 15 until reaching the second electrically conductive layer 14, is coated with an electrode 20. A via for anode side connection 19 obtained on boring through the resin 15 is coated with an electrode 21 that is insulated from the second electrically conductive layer 13 by the resin 15.

公开(公告)号：EP0969706B1

公开(公告)日：2004-03-31

申请号：EP99119308.7

申请日：1995-07-19

Applicant: TESSERA, INC.

Inventor： Distefano, Thomas H. ,  Smith, John W. ,  Karavakis, Konstantine ,  Kovak, Zlata ,  Fjelstad, Joseph

IPC: H05K3/46 ,  H05K3/42 ,  H01R12/04 ,  H05K3/44

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

公开(公告)号：EP1111975A1

公开(公告)日：2001-06-27

申请号：EP99931469.3

申请日：1999-07-22

Applicant: Toyo Kohan Co., Ltd.

Inventor： SAIJO, Kinji, Toyo Kohan Co., Ltd. ,  YOSHIDA, Kazuo, Toyo Kohan Co., Ltd. ,  OHSAWA, Shinji, Toyo Kohan Co., Ltd.

IPC: H05K3/46

CPC classification number: H05K3/062 ,  H05K3/20 ,  H05K3/44 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/09554 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10S428/901 ,  Y10T428/12903 ,  Y10T428/1291 ,  Y10T428/12931 ,  Y10T428/12944 ,  Y10T428/24917

Abstract: In the present invention, which produces a clad sheet for a multilayered printed circuit board capable of being economically manufactured and having excellent performance, a multilayered printed circuit board using thereof and a manufacturing method thereof, a multilayered printed circuit board is manufactured by

forming clad sheet for a multilayered printed circuit board 34 by
laminating copper foil 19, 24, 33 which are to be formed into conductor layer 10, 17, 18 and nickel plating 20, 21 which are to be etching-stopper layer and
simultaneously press-bonding both,
producing a base by selectively etching clad sheet for a multilayered printed circuit board 34,
forming outer conductor layer 15, 16 on the surface of the base and
simultaneously making patterning, and
electrically connecting among conductor layer 10, 15, 16 by
interposing columnar conductor 17, 18 formed by etching copper foil 19, 24, 33 and nickel plating 20, 21.

Abstract translation: 在本发明中，其产生用于多层印刷电路板能够被经济地制造，并具有优良性能的包覆板，使用它们的多层印刷电路板及其制造方法，多层印刷电路板是通过形成包层板制造 为通过层叠铜箔19，24，33将被形成为导体层10，17，18和镀镍20，21，它们将被蚀刻停止层，并同时压接二者的多层印刷电路板34， 通过选择性地蚀刻用于多层印刷电路板34包层板，所述基体的表面上形成外导体层15,16，同时使这种图案化和电通过插入柱状导体17之间的导体层10，15，16连接产生一个基 通过蚀刻铜箔19，24，33和镀镍20 18形成，21

公开(公告)号：EP1092248A1

公开(公告)日：2001-04-18

申请号：EP99912421.7

申请日：1999-03-11

Applicant: OSRAM SYLVANIA INC.

Inventor： DOIKAS, Peter ,  GEIS, David ,  MERWIN, Jeffrey, D.

IPC: H01R9/00

CPC classification number: H05K3/4038 ,  H01R43/0256 ,  H05K1/111 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10416 ,  H05K2203/033 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49153

Abstract: A method (100) for providing an electrical ground connection between a printed circuit board (700) and a metallic substrate (200) comprises steps of: (i) providing an aperture (204) in the substrate (200); (ii) forming a ground plug (302) out of metallic blank (300); (iii) inserting the ground plug (300) into the aperture in the substrate (200); (iv) compressing the ground plug (302) into the aperture (204) in the substrate (200); (v) placing the printed circuit board (700) onto the substrate (200); and (vi) applying solder into the aperture in the printed circuit board (700) and onto the ground plug (302). The steps of forming (104), inserting (106), and compressing (108) are carried out in a single punching operation (120). The method (100) efficiently provides a high quality electrical ground connection and avoids any need for sophisticated machinery.

Abstract translation: 一种用于在印刷电路板（700）和金属基板（200）之间提供电接地连接的方法（100）包括以下步骤：（i）在基板（200）中提供孔（204）; （ii）由金属坯件（300）形成接地插头（302）; （iii）将接地插头（300）插入基板（200）中的孔中; （iv）将接地插头（302）压缩到衬底（200）中的孔（204）中; （v）将印刷电路板（700）放置在基板（200）上; 和（vi）将焊料施加到印刷电路板（700）中的孔中和接地插头（302）上。 形成（104），插入（106）和压缩（108）的步骤在单个冲压操作（120）中执行。 方法（100）有效地提供高质量的电气接地连接并避免对复杂机械的任何需求。

公开(公告)号：EP0803135B1

公开(公告)日：2000-05-03

申请号：EP95927327.7

申请日：1995-07-19

Applicant: TESSERA, INC.

Inventor： DISTEFANO, Thomas, H. ,  SMITH, John, W. ,  KARAVAKIS, Konstantine ,  KOVAK, Zlata ,  FJELSTAD, Joseph

IPC: H01R12/04 ,  H01R12/32 ,  H05K3/46 ,  H05K3/42

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: An interposer for interconnection between microelectronic circuit panels (260) has contacts (250) at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad (262) on the engaged circuit panel. Thus, when the circuit panels (260) are compressed with the interposers, the contacts expand radially and wipe across the pads (262). The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material (246) carried on the contacts themselves.

公开(公告)号：EP0803135A1

公开(公告)日：1997-10-29

申请号：EP95927327.0

申请日：1995-07-19

Applicant: TESSERA, INC.

Inventor： DISTEFANO, Thomas, H. ,  SMITH, John, W. ,  KARAVAKIS, Konstantine ,  KOVAK, Zlata ,  FJELSTAD, Joseph

IPC: H01R12 ,  H01R13 ,  H01R43 ,  H05K1 ,  H05K3

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: An interposer for interconnection between microelectronic circuit panels (260) has contacts (250) at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad (262) on the engaged circuit panel. Thus, when the circuit panels (260) are compressed with the interposers, the contacts expand radially and wipe across the pads (262). The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material (246) carried on the contacts themselves.

公开(公告)号：EP0476898A3

公开(公告)日：1993-02-03

申请号：EP91308201.2

申请日：1991-09-09

Applicant: FUJITSU LIMITED

Inventor： Horikoshi, Eiji ,  Tani, Motoaki ,  Watanabe, Isao ,  Natori, Katsuhide ,  Sato, Takehiko, Gurinhiru Kamoshidanishi 23-101

IPC: H05K1/00 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  H05K3/42 ,  H05K3/28

CPC classification number: H05K1/056 ,  H05K3/0023 ,  H05K3/0041 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2203/135 ,  Y10T428/24917 ,  Y10T428/256

Abstract: A circuit board comprising: a core material consisting of any one selected from the group consisting of magnesium, a magnesium alloy, and a magnesium-based composite material; and an electric circuit formed on the core material. A process for producing the circuit board comprises: forming an electrodeposition-painted coating on such a core material; forming a polyimide resin coating on the electrodeposition-painted coating; forming a viahole extending through the resin coating to the underlying electrodeposition-painted coating; etching and removing the electrodeposition-painted coating in the region exposed in the bottom of the viahole while masking the other region with the resin coating, to extend the viahole to the core material; forming a metal film at least on a free surface of the resin coating and a inner surface of the extended viahole; and etching the metal film by using a photoresist mask to form a conductor layer having a predetermined pattern.

公开(公告)号：EP0471938A1

公开(公告)日：1992-02-26

申请号：EP91109813.5

申请日：1991-06-14

Applicant: International Business Machines Corporation

Inventor： Lauffer, John Matthew ,  Schumacher, Richard Anthony

IPC: H01L23/14 ,  H01L25/16 ,  H01L23/50

CPC classification number: H05K1/021 ,  H01L23/142 ,  H01L23/50 ,  H01L25/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2924/3011 ,  H05K1/056 ,  H05K1/182 ,  H05K1/183 ,  H05K3/0023 ,  H05K3/0058 ,  H05K3/4038 ,  H05K3/4644 ,  H05K2201/0209 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2203/049 ,  H01L2924/00014

Abstract: A microelectronic package having electrically conductive structures, e.g., power core means (11), and signal core means (15, 18), and thermal conduction means, where the thermal conduction means are part of the electrically active structure of the package, are electrically and thermally in series with the integrated circuit, and are integral to the microelectronic package. As used herein the electrically conductive structure includes the power core means (i.e., power supply core means and ground (22, 25) core means) and the signal core means. That is, as used herein, the power core means includes separate power supply core means for powering an integrated circuit (5) and ground core means for grounding the integrated circuit, and the signal core means includes circuitized means for carrying signals to and from the integrated circuit.

Abstract translation: 具有导电结构的微电子封装，例如功率芯装置（11）和信号芯装置（15,18）以及热传导装置，其中热传导装置是封装的电活性结构的一部分，是电 并与集成电路串联散热，并且是微电子封装的一部分。 如本文所使用的，导电结构包括功率芯装置（即，电源芯装置和接地（22,25）芯装置）和信号芯装置。 也就是说，如本文所使用的，功率芯装置包括用于为集成电路（5）供电的单独的供电芯装置和用于使集成电路接地的接地芯装置，并且信号芯装置包括用于将信号传送到和 集成电路。

公开(公告)号：EP0298855B1

公开(公告)日：1992-01-02

申请号：EP88401729.4

申请日：1988-07-04

Applicant: THOMSON GRAND PUBLIC

Inventor： Bercot, Jacques

IPC: H01R9/09 ,  H01R4/64

CPC classification number: H01R12/526 ,  H01R4/64 ,  H05K3/386 ,  H05K3/4046 ,  H05K3/44 ,  H05K2201/09554 ,  H05K2201/10303 ,  H05K2201/1059 ,  H05K2201/10871 ,  H05K2203/068 ,  H05K2203/1189

公开(公告)号：EP0258274A1

公开(公告)日：1988-03-09

申请号：EP87900574.0

申请日：1986-12-09

Applicant: MOTOROLA, INC.

Inventor： BROWN, Vernon, L.

IPC: H01M2 ,  H04B1 ,  H04M1 ,  H05K3 ,  H05K5 ,  H05K1

CPC classification number: H04M1/0262 ,  H01M2/1022 ,  H04B1/3883 ,  H05K1/0215 ,  H05K1/0237 ,  H05K1/144 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/44 ,  H05K5/0086 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/09054 ,  H05K2201/09554 ,  H05K2201/10969 ,  Y02P70/613

Abstract: Boîtier (104 et 600) d'un émetteur-récepteur radio-portatif (100) exploitant les caractéristiques structurales, de dissipation thermique et de blindage électrique d'une batterie. Le boîtier de circuit électronique (104 et 600) comprend une batterie constituant un élément structural solidaire. Dans le boîtier ci-décrit (104), une batterie en forme de tige (210) est fixée sur le côté d'une carte de circuit imprimé d'émetteur (213). Une carte du circuit imprimé logique (212) et une carte de circuit imprimé de récepteur (214) sont positionnées respectivement au-dessus et au-dessous de la carte du circuit imprimé d'émetteur (213), et sont maintenues ensemble par des rails latéraux à emboîtement (206, 207). Dans un deuxième boîtier illustré (600), une batterie plate (602) est fixée sur les côtés d'une première carte du circuit imprimé en U (604). Une deuxième carte du circuit imprimé en U (606) est disposée entre la batterie et la première carte (604). La chaleur dissipée par les composants électriques sur la deuxième carte (606) est absorbée et éloignée par la batterie plate (602). Le boîtier de circuit électronique ci-décrit peut être utilisé avantageusement dans une variété d'applications où des cicuits électroniques sont alimentés par une batterie.