Abstract:
PURPOSE: An ADC(Analog-to-Digital Converter) of multi-step structure using a plurality of lamp signals and an analog-to-digital conversion method thereof are provided to reduce the number of switches, thereby reducing an error of a holding voltage due to switching. CONSTITUTION: A comparator comprises: an OTA(Operational Transconductance Amplifier) which compares a signal of inputted light with a lamp value; capacitances which performs coarse analog-to-digital conversion and fine analog-to-digital conversion; and switches. A comparator is designed to respectively apply lamp signals in a coarse section and a fine section to two lamp generators without Vref voltage of an existed structure. The comparator is able to remove f-ADC and c-ADC switches.
Abstract:
본 발명은 디지털-아날로그 변환기를 개시한다.본 발명은 아날로그 전류원을 스위칭하는 신호의 변동폭을 감소시킴으로써 스위칭 신호에 의한 출력 신호의 진동 잡음을 감소시킬 수 있는 효과가 있고, 이에 따라서, 전류원의 피크 잡음도 줄일 수 있음은 물론 아날로그 전류원을 구성하는 트랜지스터의 드레인-소오스 전압의 변화를 안정적으로 제어할 수 있어, 전체 디지털-아날로그 변환기의 응답 특성을 향상시키는 효과가 있다.
Abstract:
An adaptive control circuit for the current cell control of a digital-analog converter and the digital analog converter including the same are provided to reduce the peak noise of the current source and the vibration noise of the output signal by reducing the variance of the signal switching. A digital to analog converter comprises a controller(40), an adaptation controller(50), and an analog signal output unit(60). The adaptation controller and the analog signal output unit are included in each cell of the current cell. The controller outputs the first control signal(Vin,Vinb) for switching the MOS transistor included in the analog signal output to the adaptation controller. The adaptation controller receives the first control signal from the controller, and adjusts the variance of the first control signal, and produces the second controlling signal(vin',Vinb'), and outputs the generated second controlling signal to the analog signal output unit. The analog signal output unit outputs the analog signal according to the second controlling signal.
Abstract:
본 발명은 다중 스텝 구조의 ADC에 관한 것으로서, 다중 스텝에서 비교기로 입력되는 입력전압과 비교하기 위해 비교기로 입력되는 램프 신호가 다중 스텝별로 생성되어 비교기에 입력되는 것을 특징으로 하며, 스텝 구간마다 그 구간에 대응되는 기울기를 갖는 램프 신호를 사용함으로써, 스텝 확장을 상대적으로 자유롭게 하고, 2 스텝 이상의 스텝을 갖는 다중-스텝 ADC의 구현이 용이하다.
Abstract:
PURPOSE: A time interleaved preprocessing amplifying device and a folding-interpolation analog-digital converting device using the same are provided to effectively resolve the problem of speed limit generated by multiple parallel preprocessing amplifying devices. CONSTITUTION: A time interleaved preprocessing amplifying device (210) comprises a sampling amplifying part, a preprocessing amplifying device, and a multiplexer (216). The sampling amplifying part comprises a first sampling amplifying device (211) and a second sampling amplifying device (212) and performs a sample and hold operation with a sampling frequency which is half of the sampling frequency of an analog-digital converting device. The first and second sampling amplifying devices perform a sample and hold operation having the 90 degree of a phase difference. The preprocessing amplifying part performs preprocessing amplification for a signal outputted from the sampling amplifying part. The multiplexer selects a resulting signal outputted from the preprocessing amplifying part. [Reference numerals] (212) Sampling (sample & hold) amplifying device; (214) Preprocessing amplifying device; (216) Multiplexer; (220) Folding amplifying device; (230) Interpolation; (240) Comparing device; (250) Encoder; (AA) Analogue input; (BB) Upper analogue output; (CC,DD) 1/2 sampling frequency; (EE) Lower analogue output; (FF) Sampling frequency; (GG) Digital output
Abstract:
PURPOSE: A nonlinear single slope AD converter, an image sensor device using the same, a temperature sensor device using the same and a nonlinear slope AD conversion method are provided to acquire reliable nonlinear characteristics by using a digital circuit. CONSTITUTION: A ramp generating part generates a ramp input having a set gradient. A comparator(110) compares an input voltage with the ramp input. A control block(120) transfers information about a comparison time point between the input voltage and the ramp input to a memory unit(140). The control block generates the signal saved in the memory unit or the signal for calling information. The nonlinear counter generates a signal with difference sampling frequencies from inputted clock signals.