公开(公告)号：KR1020000046538A

公开(公告)日：2000-07-25

申请号：KR1019980063225

申请日：1998-12-31

Applicant: 에스티엑스레이다시스 주식회사

Inventor： 김범수

IPC: H03M1/66

CPC classification number: H03M1/662 ,  H03M2201/93

Abstract: PURPOSE: An apparatus for outputting plural analog signals is provided to reduce the number of digital/analog converters by converting digital signals into analog signals with the use of one digital-to-analog converter. CONSTITUTION: One or more digital signal sources(D1-D3) output digital signals when an output control signal is applied. A digital-to-analog converter(30) converts the signals from the digital signal sources(D1-D3) into analog signals. A sampling/holding units(S/H1-S/H3) samples the output of the digital-to-analog converter(30) according to a sampling signal and holds the sampled signals. Low pass filters(LPF1-LPF3) filter the outputs of the sampling/holding units(S/H1-S/H3) and applies the filtered outputs to corresponding speakers(SP1-SP3).

Abstract translation: 目的：提供一种用于输出多个模拟信号的装置，以通过使用一个数模转换器将数字信号转换为模拟信号来减少数/模转换器的数量。 构成：当施加输出控制信号时，一个或多个数字信号源（D1-D3）输出数字信号。 数模转换器（30）将来自数字信号源（D1-D3）的信号转换为模拟信号。 采样/保持单元（S / H1-S / H3）根据采样信号对数模转换器（30）的输出进行采样，并保持采样信号。 低通滤波器（LPF1-LPF3）对采样/保持单元（S / H1-S / H3）的输出进行滤波，并将滤波后的输出应用于相应的扬声器（SP1-SP3）。

公开(公告)号：KR1020130030711A

公开(公告)日：2013-03-27

申请号：KR1020120060401

申请日：2012-06-05

Applicant: 동국대학교 산학협력단

Inventor： 송민규 ,  김대윤

IPC: H04N5/378 ,  H03M1/12

CPC classification number: H03M1/56 ,  H03M1/14 ,  H03M2201/235 ,  H03M2201/93 ,  H04N5/378

Abstract: PURPOSE: An ADC(Analog-to-Digital Converter) of multi-step structure using a plurality of lamp signals and an analog-to-digital conversion method thereof are provided to reduce the number of switches, thereby reducing an error of a holding voltage due to switching. CONSTITUTION: A comparator comprises: an OTA(Operational Transconductance Amplifier) which compares a signal of inputted light with a lamp value; capacitances which performs coarse analog-to-digital conversion and fine analog-to-digital conversion; and switches. A comparator is designed to respectively apply lamp signals in a coarse section and a fine section to two lamp generators without Vref voltage of an existed structure. The comparator is able to remove f-ADC and c-ADC switches.

Abstract translation: 目的：提供使用多个灯信号和其数模转换方法的多级结构的ADC（模数转换器），以减少开关数，从而减小保持电压的误差 由于切换 构成：比较器包括：将输入光的信号与灯值进行比较的OTA（运算跨导放大器）; 执行粗略模数转换和精细模数转换的电容; 和开关。 比较器被设计成分别将两个灯发电机的粗细部分和精细部分的灯信号分别施加在不存在结构的Vref电压的情况下。 比较器能够去除f-ADC和c-ADC开关。

公开(公告)号：KR1020120073836A

公开(公告)日：2012-07-05

申请号：KR1020100135721

申请日：2010-12-27

Applicant: 주식회사 실리콘웍스

Inventor： 김지훈 ,  손영준 ,  나준호 ,  장영신 ,  이상국

IPC: H03M1/38

CPC classification number: H03M1/38 ,  H03M1/14 ,  H03M1/187 ,  H03M2201/2233 ,  H03M2201/62 ,  H03M2201/93

Abstract: PURPOSE: A SAR(Successive Approximation Register) ADC(Analog To Digital Converter) is provided to reduce an installation space by using voltage division resistance instead of using a capacitor array. CONSTITUTION: A preamp part(210) includes first and second MOS transistors(M1,M2) differentially amplify a positive input voltage and a negative input voltage, respectively. A digital/analog converter(240) includes third and fourth MOS transistors(M3,M4) which differentially amplify the output voltage of a voltage divider(241). A SAR control unit(230) outputs a distribution voltage selection signal for selecting a positive DA voltage and a negative DA voltage according to output bit values of a quantizer(220). The quantizer outputs bit values by comparing output currents. The D/A converter selects the positive DA voltage and the negative DA voltage according to the distribution voltage selection signal. The D/A converter changes the output current by differentially amplifying the selected voltage.

Abstract translation: 目的：提供SAR（逐次逼近寄存器）ADC（模数转换器），通过使用分压电阻而不是使用电容阵列来减少安装空间。 构成：前置放大器部分（210）包括第一和第二MOS晶体管（M1，M2）分别差分放大正输入电压和负输入电压。 数字/模拟转换器（240）包括差分放大分压器（241）的输出电压的第三和第四MOS晶体管（M3，M4）。 SAR控制单元（230）根据量化器（220）的输出位值输出用于选择正的DA电压和负的DA电压的分配电压选择信号。 量化器通过比较输出电流输出位值。 D / A转换器根据分配电压选择信号选择正的DA电压和负的DA电压。 D / A转换器通过差分放大所选择的电压来改变输出电流。

公开(公告)号：KR1020050115099A

公开(公告)日：2005-12-07

申请号：KR1020040040385

申请日：2004-06-03

Applicant: 인하대학교 산학협력단 ,  한국소프트웨어진흥원

Inventor： 윤광섭 ,  이학규

IPC: H03M1/12

CPC classification number: H03M1/34 ,  H03M2201/22 ,  H03M2201/2377 ,  H03M2201/93

Abstract: 본 발명은 아날로그/디지털 변환기에 관한 것으로, 입력되는 아날로그 신호를 소정의 기준 전압값과 비교하는 비교기를 포함하는 아날로그/디지털 변환기에 있어서, 상기 비교기는 두개의 인버터가 루프로 연결되어 입력된 신호에 따라 하이 또는 로우 레벨로 발산시키는 바이스테이블 회로를 포함함을 특징으로 한다.

公开(公告)号：KR1020010064488A

公开(公告)日：2001-07-09

申请号：KR1019990064691

申请日：1999-12-29

Applicant: 에스케이하이닉스 주식회사

Inventor： 윤의식

IPC: H03M1/12

CPC classification number: H03M1/468 ,  H03M1/20 ,  H03M2201/93

Abstract: PURPOSE: An analog/digital converter is provided which divides an analog input signal into pieces to obtain high resolution without increasing the resolution of a D/A converter and to reduce power consumption. CONSTITUTION: An analog/digital converter includes a signal input unit(10) for selectively outputting an analog input signal and the first and second reference voltages under the control of a controller(16), and a D/A converter(9) for receiving a signal from the signal input unit and data bits from the controller to digital-analog-convert the signal and data bits. The A/D converter further has a comparator(13) for comparing the output value of the D/A converter with a reference voltage, and a successive approximation register(15) for storing the value output from the comparator. The controller receives data output from the register to send the data to the D/A converter and controls the operation of the aforementioned units.

Abstract translation: 目的：提供一种模拟/数字转换器，将模拟输入信号分成多段，以获得高分辨率，而不会增加D / A转换器的分辨率并降低功耗。 构成：模拟/数字转换器包括用于在控制器（16）的控制下选择性地输出模拟输入信号和第一和第二参考电压的信号输入单元（10）和用于接收的D / A转换器（9） 来自信号输入单元的信号和来自控制器的数据位数字模拟转换信号和数据位。 A / D转换器还具有用于将D / A转换器的输出值与参考电压进行比较的比较器（13），以及用于存储从比较器输出的值的逐次逼近寄存器（15）。 控制器接收从寄存器输出的数据，将数据发送到D / A转换器，并控制上述单元的操作。

公开(公告)号：KR1020060124326A

公开(公告)日：2006-12-05

申请号：KR1020050046192

申请日：2005-05-31

Applicant: 엘지전자 주식회사

Inventor： 이승현

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M7/165 ,  H03M2201/814 ,  H03M2201/93

Abstract: A digital to analog converter module is provided to reduce a manufacturing cost by forming an integrated structure as one chip. A thermometer decoder(110) converts an inputted upper digital code of m bits to a thermometer code. A latch unit(120) synchronizes the thermometer code and an inputted lower digital code of m bits according to an inputted clock signal. A thermometer code current cell matrix(160) is driven by the thermometer code outputted from the latch unit in order to convert the thermometer code to analog current. First and second binary weight current cells are driven by the lower digital code of m bits outputted from the latch unit in order to convert the lower digital code of m bits to the analog current. A switching unit(130) outputs selectively the lower digital code of m bits to the first binary weight current cell or the second binary weight current cell according to a mode selection signal.

Abstract translation: 提供了一种数模转换器模块，通过形成作为一个芯片的集成结构来降低制造成本。 温度计解码器（110）将输入的m位的上位数字码转换为温度计代码。 闩锁单元（120）根据输入的时钟信号使温度计代码和输入的m位的较低数字码同步。 温度计代码当前单元矩阵（160）由从锁存单元输出的温度计代码驱动，以将温度计代码转换为模拟电流。 第一和第二二进制加权电流单元由从锁存单元输出的m位的较低数字码驱动，以便将较低数字码的m位转换为模拟电流。 根据模式选择信号，切换单元（130）选择性地将m位的较低数字码输出到第一二进制加权当前单元或第二二进制加权当前单元。

公开(公告)号：KR1020000019815A

公开(公告)日：2000-04-15

申请号：KR1019980038091

申请日：1998-09-15

Applicant: 현대반도체 주식회사

Inventor： 이정한

IPC: H03M1/66

CPC classification number: H03M1/76 ,  H03M2201/93

Abstract: PURPOSE: An analog/digital converter is provided to realize a high power by preventing a delay of a conversion speed owing to a capacitance. CONSTITUTION: In an analog/digital converter, 2¬(n-1) resistors have first ends coupled to a reference voltage terminal, respectively. A first voltage dividing part(21) is composed of switches coupled to second ends of the 2¬(n-1) resistors, respectively. (2¬(n-1)-1) resistors have first ends coupled to a ground voltage terminal, respectively, and a second voltage dividing part(22) is composed of switches coupled to second ends of the (2¬(n-1)-1) resistors, respectively. An OP-AMP(23) has an inverse terminal coupled to a common node, to which an output of the first voltage dividing part and an output of the second voltage dividing part are coupled, and a non-inverse terminal coupled to receive an intermediate voltage of a reference voltage. A switching part(24) is composed of 2¬(n-1) switches configured in parallel between the common node and the inverse terminal. A resistor(R') is coupled between the switching part and an output terminal of the OP-AMP, and adjusts a dynamic range.

Abstract translation: 目的：提供模拟/数字转换器，通过防止由于电容引起的转换速度的延迟来实现高功率。 构成：在模拟/数字转换器中，2（n-1）个电阻分别与参考电压端子耦合。 第一分压部分（21）分别由耦合到2（n-1）个电阻器的第二端的开关组成。 （2-n-1）-1）电阻器分别具有耦合到接地电压端子的第一端，并且第二分压部分（22）由耦合到第（2-（n-1） ）-1）电阻。 OP-AMP（23）具有耦合到公共节点的反向端子，第一分压部分的输出和第二分压部分的输出耦合到该公共节点，以及耦合以接收中间 参考电压的电压。 开关部分（24）由在公共节点和反向终端之间并联配置的2（n-1）个开关组成。 电阻器（R'）耦合在开关部分和OP-AMP的输出端子之间，并调整动态范围。

公开(公告)号：KR1020000014801A

公开(公告)日：2000-03-15

申请号：KR1019980034385

申请日：1998-08-25

Applicant: 현대반도체 주식회사

Inventor： 이용섭

IPC: H03M1/16

CPC classification number: H03M1/48 ,  H03M1/007 ,  H03M2201/62 ,  H03M2201/93

Abstract: PURPOSE: An analog-digital convertor is provided to reduce a layout area by using basically embedded program memory and general purpose register. CONSTITUTION: A central processing unit(202) has a program memory(204) storing an analog-digital converting program and a general purpose register(206) storing a digital signal generated at an execution process of the analog-digital converting program. A digital-analog convertor(208) converts a digital signal outputted from the general purpose register into an analog signal. A comparator(210) receives a sampled analog input signal as a comparison signal and an output signal from the digital-analog signal as a reference signal, and outputs a comparison result of the comparison signal and the reference signal to the program memory.

Abstract translation: 目的：提供模拟数字转换器，通过使用基本嵌入式程序存储器和通用寄存器来减少布局面积。 构成：中央处理单元（202）具有存储模拟数字转换程序和存储在模拟数字转换程序的执行过程中生成的数字信号的通用寄存器（206）的程序存储器（204）。 数字模拟转换器（208）将从通用寄存器输出的数字信号转换为模拟信号。 比较器（210）将作为比较信号的采样模拟输入信号和来自数字 - 模拟信号的输出信号作为参考信号接收，并将比较信号和参考信号的比较结果输出到程序存储器。

公开(公告)号：KR1020000013738A

公开(公告)日：2000-03-06

申请号：KR1019980032775

申请日：1998-08-12

Applicant: 삼성전자주식회사

Inventor： 조영균

IPC: H03M1/12

CPC classification number: H03M1/361 ,  H03M2201/93

Abstract: PURPOSE: An analog-digital converter is provided to reduce the number of resistance and comparator. CONSTITUTION: The analog-digital converter comprises: a first digital-analog converting unit(110) for converting a digital signal of N/2 bits to a first analog signal; a second digital-analog converting unit(120) for converting the digital signal of N/2 bits to a second analog signal, the second analog signal being lower level than the first analog signal; and an analog-digital converting unit(100) for converting an outer input analog signal to the digital signal of N/2 bits corresponding to the high level or the digital signal of N/2 bits corresponding to the low level according to a control signal.

Abstract translation: 目的：提供模数转换器以减少电阻和比较器的数量。 构成：模拟数字转换器包括：第一数模转换单元（110），用于将N / 2位的数字信号转换为第一模拟信号; 第二数模转换单元，用于将N / 2位的数字信号转换为第二模拟信号，第二模拟信号比第一模拟信号低; 以及模拟数字转换单元（100），用于根据控制信号将外部输入模拟信号转换为对应于高电平的N / 2位的数字信号或对应于低电平的N / 2位的数字信号 。

公开(公告)号：KR101200942B1

公开(公告)日：2012-11-13

申请号：KR1020110103277

申请日：2011-10-10

Applicant: 동국대학교 산학협력단

Inventor： 송민규 ,  김대윤 ,  김영훈 ,  최동귀

IPC: H03M1/12

CPC classification number: H03M1/141 ,  H03M1/121 ,  H03M2201/2216 ,  H03M2201/61 ,  H03M2201/62 ,  H03M2201/93

Abstract: PURPOSE: An analog-digital converter and a method thereof are provided to increase accuracy by using folding and interpolation. CONSTITUTION: An upper signal processing part(120) generates an upper analog signal by amplifying an analog signal in a preset amplification ratio. A lower signal processing part(130) generates a lower analog signal by amplifying and folding the analog signal through an amplification line including an odd number of amplifiers. A comparison part(140) generates a comparison signal by comparing the upper analog signal and the lower analog signal according to a preset reference voltage. An encoding part(150) generates an upper digital signal by the upper analog signal and a lower digital signal by the lower analog signal according to the comparison signal. The encoding part generates an output signal by adding the upper digital signal and the lower digital signal. [Reference numerals] (110) Input part; (120) Upper signal processing part; (130) Lower signal processing part; (140) Comparison part; (150) Encoding part

Abstract translation: 目的：提供一种模拟数字转换器及其方法，以通过使用折叠和插值来提高精度。 构成：上信号处理部（120）通过以预设的放大率放大模拟信号来生成上模拟信号。 较低信号处理部分（130）通过包括奇数放大器的放大线放大和折叠模拟信号来产生较低的模拟信号。 比较部分（140）通过根据预设的参考电压比较上模拟信号和下模拟信号来产生比较信号。 编码部分（150）根据比较信号通过上模拟信号和较低数字信号通过较低模拟信号产生上数字信号。 编码部分通过将上数字信号和下数字信号相加来产生输出信号。 （附图标记）（110）输入部; （120）上信号处理部分; （130）下信号处理部分; （140）比较部分; （150）编码部分