公开(公告)号：KR1020140077532A

公开(公告)日：2014-06-24

申请号：KR1020120146446

申请日：2012-12-14

Applicant: 삼성전기주식회사

Inventor： 유도재 ,  윤선우 ,  채준석 ,  김광수

IPC: H01L23/48 ,  H01L23/12

CPC classification number: H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention relates to a power module package and a method for manufacturing the same. The power module package according to the embodiment of the present invention includes an external connection terminal; a substrate which has a combination unit which is inserted into one end of the external connection terminal; and a semiconductor chip which is mounted on one surface of the substrate. According to one embodiment of the present invention, the substrate includes an insulating material; a circuit layer which is formed in one surface of the insulating material, and a metal layer which is formed on the other surface of the insulating material.

Abstract translation: 电源模块封装及其制造方法技术领域本发明涉及功率模块封装及其制造方法。 根据本发明的实施例的功率模块封装包括外部连接端子; 基板，其具有插入到所述外部连接端子的一端的组合单元; 以及安装在基板的一个表面上的半导体芯片。 根据本发明的一个实施例，基板包括绝缘材料; 形成在绝缘材料的一个表面上的电路层和形成在绝缘材料的另一个表面上的金属层。

公开(公告)号：KR1020140077486A

公开(公告)日：2014-06-24

申请号：KR1020120146347

申请日：2012-12-14

Applicant: 삼성전기주식회사

Inventor： 김태현 ,  유도재 ,  서범석

IPC: H01L23/48 ,  H01L25/065

CPC classification number: H01L23/3735 ,  H01L23/053 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49811 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: According to an embodiment of the present invention, a power module package includes: a substrate including a metal layer; a first insulation layer formed on the metal layer; a first circuit pattern formed on the first insulation layer and includes a first pad and a second pad separated from the first pad; a second insulation layer formed on the first insulation layer to cover the first circuit pattern, and a second circuit pattern formed on the second insulation layer and includes a third pad formed on a location corresponding to the first pad and a fourth pad separated from the third pad; a semiconductor chip mounted on the second circuit pattern; and an external connection terminal having one end electrically connected to the semiconductor chip and an opposite end protruding to the outside.

Abstract translation: 根据本发明的实施例，功率模块封装包括：包括金属层的衬底; 形成在所述金属层上的第一绝缘层; 第一电路图案，形成在第一绝缘层上，并且包括第一焊盘和与第一焊盘分离的第二焊盘; 形成在所述第一绝缘层上以覆盖所述第一电路图案的第二绝缘层，以及形成在所述第二绝缘层上的第二电路图案，并且包括形成在与所述第一焊盘相对应的位置处的第三焊盘和与所述第三绝缘层分离的第三焊盘 垫; 安装在第二电路图案上的半导体芯片; 以及外部连接端子，其一端电连接到半导体芯片，另一端突出到外部。

公开(公告)号：KR1020140077485A

公开(公告)日：2014-06-24

申请号：KR1020120146346

申请日：2012-12-14

Applicant: 삼성전기주식회사

Inventor： 김태현 ,  김광수 ,  윤선우 ,  이영기 ,  유도재

IPC: H01L25/065 ,  H01L23/28

CPC classification number: H01L23/053 ,  H01L23/3735 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A power module package according to one embodiment of the present invention includes a first substrate which has one surface and the other surface, a first semiconductor chip which is mounted on one surface of the first substrate, a first module which is made of a first sealing part which covers the first semiconductor chip which is mounted on the one surface of the first substrate from both sides of the thickness direction of the first substrate and exposes the other surface of the first substrate, and a case which surrounds the first module.

Abstract translation: 根据本发明的一个实施例的功率模块封装包括具有一个表面和另一个表面的第一基板，安装在第一基板的一个表面上的第一半导体芯片，由第一密封件 该部分覆盖从第一基板的厚度方向的两侧安装在第一基板的一个表面上并暴露第一基板的另一个表面的第一半导体芯片以及围绕第一模块的壳体。

公开(公告)号：KR1020140055038A

公开(公告)日：2014-05-09

申请号：KR1020120121287

申请日：2012-10-30

Applicant: 삼성전기주식회사

Inventor： 김태현 ,  서범석 ,  유도재 ,  김광수

IPC: H01L25/065 ,  H01L23/36

CPC classification number: H01L24/34 ,  H01L24/33 ,  H01L24/36 ,  H01L24/40 ,  H01L24/41 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A unit power module according to the present invention comprises a first semiconductor chip with a 1-1 electrode and a 1-2 electrode spaced apart from the 1-1 electrode on one surface and a 1-3 electrode on the other surface; a second semiconductor chip with a 2-1 electrode on one surface and a 2-2 electrode on the other surface; a first metal plate in contact with the 1-1 electrode of the first semiconductor chip and the 2-1 electrode of the second semiconductor chip; a second metal plate in contact with the 1-2 electrode of the first semiconductor chip and spaced apart from the first metal plate; a third metal plate in contact with the 1-3 electrode of the first semiconductor chip and the 2-2 electrode of the second semiconductor chip; and a sealing member surrounding the first metal plate, the second metal plate, and the third metal plate.

Abstract translation: 根据本发明的单元电源模块包括具有1-1电极的第一半导体芯片和在一个表面上与1-1电极间隔开的1-2电极和在另一个表面上的1-3电极; 在一个表面上具有2-1电极的第二半导体芯片和另一个表面上的2-2电极; 与第一半导体芯片的1-1电极和第二半导体芯片的2-1电极接触的第一金属板; 与第一半导体芯片的1-2电极接触并与第一金属板间隔开的第二金属板; 与第一半导体芯片的1-3电极和第二半导体芯片的2-2电极接触的第三金属板; 以及围绕所述第一金属板，所述第二金属板和所述第三金属板的密封构件。

公开(公告)号：KR3007307020001S

公开(公告)日：2014-03-11

申请号：KR3020130014229

申请日：2013-03-20

Applicant: 삼성전기주식회사

Designer： 유도재 ,  김선호 ,  김광수 ,  서범석

公开(公告)号：KR3007307020000S

公开(公告)日：2014-02-26

申请号：KR3020130014207

申请日：2013-03-20

Applicant: 삼성전기주식회사

Designer： 유도재 ,  김선호 ,  김광수 ,  서범석

公开(公告)号：KR101070814B1

公开(公告)日：2011-10-06

申请号：KR1020100052401

申请日：2010-06-03

Applicant: 삼성전기주식회사

Inventor： 유도재 ,  권영도 ,  강준석 ,  이창배

IPC: H01L23/28

CPC classification number: H01L23/3121 ,  H01L23/49811 ,  H01L23/50 ,  H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: 반도체패키지 및 그 제조방법이 개시된다. 접지회로가 형성되어 있으며, 일면에 반도체칩이 실장된 기판, 기판의 타면에 형성되어 있으며 접지회로와 연결된 도전성의 접지층, 반도체칩이 실장된 기판 및 접지층을 밀봉시키는 몰딩부, 몰딩부을 커버하고 있으며 접지층과 연결된 도전성의 차폐부를 포함하는 반도체패키지는, 전체가 몰딩된 구조에서도 차폐를 위한 접지 연결이 가능할 수 있으며, 2중의 차폐구조가 형성되어 차폐능력이 향상될 수 있다.

公开(公告)号：KR101070799B1

公开(公告)日：2011-10-06

申请号：KR1020100052413

申请日：2010-06-03

Applicant: 삼성전기주식회사

Inventor： 유도재 ,  도재천

IPC: H01L23/28 ,  H01L23/52

CPC classification number: H01L23/3121 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/73253 ,  H01L2924/01033 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/19107

Abstract: 반도체패키지 및 그 제조방법이 개시된다. 접지회로가 형성된 기판, 기판에 실장된 반도체칩, 반도체칩의 상면에 형성되어 있으며 접지회로와 연결된 도전성의 제1차폐부, 기판 및 반도체칩을 커버하고 있으며 제1차폐부와 연결된 도전성의 제2차폐부를 포함하는 반도체패키지는, 반도체칩의 상면에도 차폐층이 형성되어 반도체칩 간에도 차폐가 이루질 수 있으며, 2중의 차폐구조가 형성되어 차폐능력이 향상될 수 있다.

公开(公告)号：KR1020100126909A

公开(公告)日：2010-12-03

申请号：KR1020090045332

申请日：2009-05-25

Applicant: 삼성전기주식회사

Inventor： 가오,샨 ,  최석문 ,  유도재 ,  김태현 ,  장범식 ,  박지현

IPC: H01L23/36 ,  H05K7/20

CPC classification number: H01L23/467 ,  H01L23/142 ,  H01L23/24 ,  H01L23/3735 ,  H01L23/427 ,  H01L25/071 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: PURPOSE: A power semiconductor module is provided to improve radiation performance by including a cooling member in a metal plate. CONSTITUTION: An anode oxidation layer(114) is formed on the surface of an anode oxidation metallic plate(110). The anode oxidation layer is formed by applying an anode to a metal plate(112). A circuit layer(116a) is formed in the anode oxidation layer. The circuit layer is connected to a power device(120a) through a second wire(126a). The power device is attached to the circuit layer through soldering.

Abstract translation: 目的：提供功率半导体模块以通过在金属板中包括冷却构件来改善辐射性能。 构成：在阳极氧化金属板（110）的表面上形成阳极氧化层（114）。 阳极氧化层通过将阳极施加到金属板（112）而形成。 在阳极氧化层中形成电路层（116a）。 电路层通过第二线（126a）连接到功率器件（120a）。 电源设备通过焊接连接到电路层。

公开(公告)号：KR102248527B1

公开(公告)日：2021-05-06

申请号：KR1020190051574

申请日：2019-05-02

Applicant: 삼성전기주식회사

Inventor： 유도재 ,  김병헌 ,  남궁용길 ,  홍종철 ,  양시중

IPC: H01L27/146 ,  H01L23/31

Abstract: 본발명의일 실시예에따른이미지센서패키지는기판; 상기기판에실장되며, 본딩와이어에의해상기기판과연결되는이미지센서; 상기이미지센서의일부와상기본딩와이어를밀봉하며, 상기이미지센서의유효촬상면을노출시키는홀이형성된밀봉부재; 적어도일부가상기밀봉부재에삽입되도록상기이미지센서에형성된반사체; 및상기밀봉부재에부착되는필터;를포함할수 있다.