적층 세라믹 커패시터
    22.
    发明公开
    적층 세라믹 커패시터 无效
    多层陶瓷电容器

    公开(公告)号:KR1020120099978A

    公开(公告)日:2012-09-12

    申请号:KR1020110018541

    申请日:2011-03-02

    Abstract: PURPOSE: A multi layer ceramic capacitor is provided to reduce acoustic noise generated in a multi layer ceramic capacitor by controlling the thickness of dielectrics and chip dielectric ratio. CONSTITUTION: A multi layer ceramic capacitor includes a ceramic body(100) and external electrodes(200a,200b). The ceramic body includes a plurality of dielectric layers. A first internal electrode and a second internal electrode are laminated to be faced with a plurality of dielectric layers. The particle diameter of the ceramic powder is between 50 micrometer and 130 micrometer. The ceramic powder includes BaTiO3 powder. The dielectric layer includes one or more MN oxide, Y oxide, Dy oxide, Mg oxide, and Xi oxide.

    Abstract translation: 目的:提供多层陶瓷电容器,通过控制电介质的厚度和芯片电介质比来减少多层陶瓷电容器产生的声音噪声。 构成:多层陶瓷电容器包括陶瓷体(100)和外部电极(200a,200b)。 陶瓷体包括多个电介质层。 第一内部电极和第二内部电极层叠以面对多个电介质层。 陶瓷粉末的粒径在50微米到130微米之间。 陶瓷粉末包括BaTiO3粉末。 电介质层包括一种或多种氧化物,Y氧化物,Dy氧化物,Mg氧化物和Xi氧化物。

    외부전극용 도전성 페이스트 조성물, 이를 포함하는 적층 세라믹 커패시터 및 그 제조방법
    23.
    发明公开
    외부전극용 도전성 페이스트 조성물, 이를 포함하는 적층 세라믹 커패시터 및 그 제조방법 无效
    用于终止电极的糊状化合物和包含其的多层陶瓷电容器及其制造方法

    公开(公告)号:KR1020120068622A

    公开(公告)日:2012-06-27

    申请号:KR1020100130318

    申请日:2010-12-17

    CPC classification number: H01G4/2325 H01B1/16 H01G4/30

    Abstract: PURPOSE: A conductive paste composition for external electrode is provided to improve chip reliability and to prevent the penetration of plating liquid by comprising glass frit composition with improved corrosion resistance against tin plating solution. CONSTITUTION: A conductive paste composition for external electrode comprises conductive metal powder, and glass frit composed to aSiO_2-bB_2O_3-cAl_2O_3-dTM_xO_y-eR^1_2O-fR^2O. In here, TM is a transition metal selected from zinc, titanium, copper, vanadium, manganese, iron, and nickel. R^1 is selected from lithium, sodium, and potassium, and R^2 is selected from magnesium, potassium, strontium, and barium, and x,y>0, a is 15-80, b is 15-45, c is 1-10, d is 1-50, e is 2-30, and f is respectively selected to satisfy a+b+c+d+e+f=100(mol%) within the range of 5-40(mol%).

    Abstract translation: 目的:提供一种用于外部电极的导电糊剂组合物,以提高芯片的可靠性,并且通过包含对镀锡溶液具有改善的耐腐蚀性的玻璃料组合物来防止电镀液渗透。 构成:用于外部电极的导电糊剂组合物包括导电金属粉末和由SiO 2-b B 2 O 3 -cAl 2 O 3-d TM_xO_y-eR 1 1 O 2 -F 2 O 2组成的玻璃料。 在这里,TM是选自锌,钛,铜,钒,锰,铁和镍的过渡金属。 R ^ 1选自锂,钠和钾,R ^ 2选自镁,钾,锶和钡,x,y> 0,a为15-80,b为15-45,c为 1-10,d为1-50,e为2-30,f分别选择为满足+ b + c + d + e + f = 100(摩尔%),范围为5-40(摩尔% )。

    내환원성 유전체 조성물 및 이를 포함하는 세라믹 전자 부품
    24.
    发明公开
    내환원성 유전체 조성물 및 이를 포함하는 세라믹 전자 부품 有权
    不可稀释的电介质组合物和陶瓷电子元件

    公开(公告)号:KR1020120023509A

    公开(公告)日:2012-03-13

    申请号:KR1020110052282

    申请日:2011-05-31

    Abstract: PURPOSE: A reduction-resistant dielectric composition and a ceramic electronic elements including thereof are provided to secure capacity by increasing molar ratio of base material powder. CONSTITUTION: A reduction-resistant dielectric composition comprises BaTiO3 based base material powder, 0.1-1.0 mole of transition metal oxide or carbonate based on 100 mole of the base material powder, and 0.1-3.0 mole of sintering aid including SiO2. The average particle diameter of the base material powder is 0.05-0.5micro meter. The transition metal is at least one selected from a group consisting of Mn, V, Cr, Fe, Ni, Co, Cu and Zn. A ceramic electronic component comprises a ceramic body(110) which a plurality of dielectric layers(111) are laminated, internal electrodes(130a,130b) which are formed inside the ceramic body and include non-metals, and exterior electrodes(120a,120b) which are electrically connected to the internal electrodes.

    Abstract translation: 目的:提供一种还原性电介质组合物及其包括的陶瓷电子元件,以通过增加基材粉末的摩尔比来确保容量。 构成:还原性电介质组合物包含基于100摩尔基材粉末的BaTiO 3基基材料粉末,0.1-1.0摩尔过渡金属氧化物或碳酸酯,以及0.1-3.0摩尔包括SiO 2的烧结助剂。 基材粉末的平均粒径为0.05〜0.5微米。 过渡金属为选自Mn,V,Cr,Fe,Ni,Co,Cu和Zn中的至少一种。 陶瓷电子部件包括层叠多个电介质层(111)的陶瓷体(110),形成在陶瓷体的内部并且包含非金属的内部电极(130a,130b)和外部电极(120a,120b) ),其电连接到内部电极。

    전기 이중층 캐패시터 및 그 제조방법
    25.
    发明授权
    전기 이중층 캐패시터 및 그 제조방법 失效
    电双层电容器及其制造方法

    公开(公告)号:KR101069958B1

    公开(公告)日:2011-10-04

    申请号:KR1020090088739

    申请日:2009-09-18

    Abstract: 본발명은, 분리막과그 분리막을사이에두고교대로적층된적어도하나의제1 및제2 분극성전극을갖는전기이중층셀과, 상기전기이중층셀의대향하는제1 및제2 측면에각각형성된제1 외부전극및 제2 외부전극을포함하는전기이중층캐패시터를제공한다. 또한, 상기제1 분극성전극은, 제1 집전층과, 상기제1 집전층의대향하는양면중 상기분리막과마주하는면에형성된제1 활물질층을포함하고, 상기제1 외부전극에접속되도록상기전기이중층셀의제1 측면까지연장되되상기제2 외부전극과는절연되도록상기제2 측면과전기적으로분리되며, 상기제2 분극성전극은, 제2 집전층과, 상기제2 집전층의대향하는양면중 상기분리막과마주하는면에형성된제2 활물질층을포함하며, 상기제2 외부전극에접속되도록상기전기이중층셀의제2 측면까지연장되되상기제1 외부전극과는절연되도록상기제2 측면과전기적으로분리된다.

    적층 세라믹 커패시터 및 그 제조방법
    26.
    发明公开
    적층 세라믹 커패시터 및 그 제조방법 有权
    多层陶瓷电容器及其制造方法

    公开(公告)号:KR1020110077797A

    公开(公告)日:2011-07-07

    申请号:KR1020090134458

    申请日:2009-12-30

    CPC classification number: H01G4/12 H01G4/005 H01G4/008 H01G4/01 Y10T29/435

    Abstract: PURPOSE: A multilayer ceramic capacitor and a manufacturing method thereof are provided to suppress blister and crack between a capacity unit and a protection unit by improving adhesion between the capacity unit and the protection layer. CONSTITUTION: A ceramic element(110) includes a capacity unit(110B) and a protection layer(110A) which is formed on the upper and lower sides of the capacity unit. The capacity unit includes a plurality of dielectric element layers(111) and a plurality of first and second internal electrodes(120a,120b). The first and second internal electrodes are electrically insulated by the dielectric layer. The protection layer is formed on the upper side or lower side of the capacity unit. A first external electrode(130a) and a second external electrode(130b) are electrically connected to the first and second internal electrodes exposed in the stack direction of the dielectric layer.

    Abstract translation: 目的:提供一种多层陶瓷电容器及其制造方法,其通过提高容量单元与保护层之间的粘附性来抑制电容单元与保护单元之间的起泡和裂纹。 构成:陶瓷元件(110)包括形成在容纳单元的上侧和下侧的容量单元(110B)和保护层(110A)。 容量单元包括多个电介质层(111)和多个第一和第二内部电极(120a,120b)。 第一和第二内部电极通过电介质层电绝缘。 保护层形成在容量单元的上侧或下侧。 第一外部电极(130a)和第二外部电极(130b)电连接到在电介质层的堆叠方向上暴露的第一和第二内部电极。

    전기 이중층 캐패시터 및 그 제조방법
    27.
    发明公开
    전기 이중층 캐패시터 및 그 제조방법 失效
    电双层电容器及其制造方法

    公开(公告)号:KR1020110031025A

    公开(公告)日:2011-03-24

    申请号:KR1020090088739

    申请日:2009-09-18

    Abstract: PURPOSE: An electric double layer capacitor and a method for manufacturing the same are provided to use a polarization electrode and a separation film as sheets, thereby forming an electric double layer capacitor in a chip type. CONSTITUTION: An electric double layer cell(21) includes a separation film(25), a first polarization electrodes, and a second polarization electrodes. The first polarization electrodes and the second polarization electrodes are alternatively stacked. The first and second polarization electrodes include first and second current collecting layers and first and second active material layers formed on one of both sides facing the first and second current collecting layers. The first and second polarization electrodes include the first and second active material layers formed on both sides facing the first and second current collecting layers.

    Abstract translation: 目的:提供双电层电容器及其制造方法,以使用极化电极和分离膜作为片材,从而形成芯片型双电层电容器。 构成:电双层电池(21)包括分离膜(25),第一极化电极和第二极化电极。 交替堆叠第一极化电极和第二极化电极。 第一和第二极化电极包括形成在面向第一集电层和第二集电层的两侧之一上形成的第一和第二集电层和第一和第二活性材料层。 第一和第二极化电极包括形成在面向第一集电层和第二集电层的两侧上的第一和第二活性材料层。

    저온 소성용 유전체 자기조성물 및 이를 이용한 적층세라믹 콘덴서
    29.
    发明授权
    저온 소성용 유전체 자기조성물 및 이를 이용한 적층세라믹 콘덴서 有权
    저온소성용유전체자기조성물및이를이용한적층세라믹믹서

    公开(公告)号:KR100631995B1

    公开(公告)日:2006-10-09

    申请号:KR1020050069035

    申请日:2005-07-28

    Abstract: A dielectric ceramic composition for low temperature sintering and a multi-layered ceramic condenser using the same are provided to sinter the composition under a reduction atmosphere. A dielectric ceramic composition includes (Ba(1-x)Cax)mTiO3 as a main component. The dielectric ceramic composition includes MgCO3, Re2O3, MO, MnO, V2O5, Cr2O3, and SiO2 as residue. The composition is a(Ba1-xCax)mTiO3-BMgCO3-cRe2O3-dMnO-fSiO2-gV2O5-hCr2O3.

    Abstract translation: 提供用于低温烧结的介电陶瓷组合物和使用该组合物的多层陶瓷电容器以在还原气氛下烧结组合物。 介电陶瓷组合物包含(Ba(1-x)Ca x)mTiO 3作为主要组分。 介电陶瓷组合物包括MgCO3,Re2O3,MO,MnO,V2O5,Cr2O3和SiO2作为残余物。 该组成是(Ba1-xCax)mTiO3-BMgCO3-cRe2O3-dMnO-fSiO2-gV2O5-hCr2O3。

    내환원성 유전체 조성물 및 그 제조방법
    30.
    发明授权
    내환원성 유전체 조성물 및 그 제조방법 有权
    不可还原电介质组合物及其制造方法

    公开(公告)号:KR100533639B1

    公开(公告)日:2005-12-06

    申请号:KR1020040012107

    申请日:2004-02-24

    Abstract: 본 발명은 내환원성 유전체 조성물 및 그 제조방법에 관한 것이다.
    본 발명은 주성분인 (Ca
    1-x Sr
    x )
    m (Ti
    y Zr
    1-y )O
    3 (0≤x≤1, 0≤y≤0.09, 0.7≤m≤1.05) 100중량부에 대하여, aMnO-bSiO
    2 -dR
    1 O-eR
    2 O
    2 (a+b+d+e=100이며, 20≤a≤60, 10≤b≤65, 0≤d+e≤65, R
    1 은 Mg, Ca, Sr, Ba중 선택된 하나 이상의 성분, R
    2 는 Zr, Ti중 선택된 하나 이상의 성분): 0.5~10중량부, MnO
    2 : 0.1~3중량부를 포함하여 이루어진다.
    또한, 본 발명은 상기 내환원성 유전체 조성물의 제조방법을 제공한다.
    본 발명은 1250℃ 이하의 낮은 소성온도에서 소성하더라도 글래스 뭉침 현상이 발생되지 않아 이를 적층 세라믹 콘덴서에 적용할 경우 박층 고용량화 및 신뢰성을 확보할 수 있는 효과가 있다.

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