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    LOW ENERGY ION BEAM OXIDATION PROCESS
    22.
    发明专利
    LOW ENERGY ION BEAM OXIDATION PROCESS 未知

    公开(公告)号：CA1156603A

    公开(公告)日：1983-11-08

    申请号：CA388982

    申请日：1981-10-29

    Applicant: IBM

    Inventor： CUOMO JEROME J ,  HARPER JAMES M E

    IPC: C23F4/00 ,  C23C14/48 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/316 ,  H01L39/24 ,  H01L49/00 ,  C23C15/00

    Abstract: YO980-051 LOW ENERGY ION BEAM OXIDATION PROCESS A surface reaction process for controlled oxide growth is disclosed using a directed, low energy ion beam for compound or oxide formation. The technique is evaluated by fabricating Ni-oxide-Ni and Cr-oxide-Ni tunneling junctions, using directed oxygen ion beams with energies ranging from about 30 to 180 eV. In one embodiment, high ion current densities are achieved at these low energies by replacing the conventional dual grid extraction system of the ion source with a single fine mesh grid. Junction resistance decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simultaneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature of ion beam techniques allows greater control over the growth process.

    GROWTH OF POLYCRYSTALLINE SEMICONDUCTOR FILM WITH INTERMETALLIC NUCLEATING LAYER
    23.
    发明专利
    GROWTH OF POLYCRYSTALLINE SEMICONDUCTOR FILM WITH INTERMETALLIC NUCLEATING LAYER 未知

    公开(公告)号：CA1088677A

    公开(公告)日：1980-10-28

    申请号：CA292874

    申请日：1977-12-12

    Applicant: IBM

    Inventor： CUOMO JEROME J ,  DISTEFANO THOMAS H ,  ROSENBERG ROBERT

    IPC: C23C14/02 ,  C23C16/00 ,  C30B11/12 ,  C30B23/02 ,  C30B25/02 ,  C30B25/18 ,  B01J17/26 ,  H01L21/18

    Abstract: GROWTH OF POLYCRYSTALLINE SEMICONDUCTOR FILM WITH INTERMETALLIC NUCLEATING LAYER A method is disclosed for fabricating a thin elemental semiconductor, e.g., Si or Ge, film with columnar grains in a filamentary structure, by the use of an intermetallic compound incorporating the elemental semiconductor to form a nucleating layer for the growth of the semiconducting film. The semiconductor is grown from vapor phase by the technique of either vacuum evaporation or chemical vapor deposition, e.g., by decomposition of SiH4. The semiconductor e.g., Si, is initially deposited onto a thin film of a specific metal, e.g., Pt or Ni, on any inert substrate, e.g., SiO2 or Al2O3, which is held at a temperature, e.g., 900.degree.C, above the eutectic point, i.e., 830.degree.C, of an intermetallic compound and the metallic film, and below the eutectic point, i.e., 979.degree.C, of another intermetallic compound and the semiconductor. Deposition of the semiconductor onto the metallic film produces a layer of liquid comprising the semiconductor and metal, which increases in thickness until the metallic layer is completely consumed. Additional deposition of the semiconductor produces a supersaturated liquid from which large crystallites of the intermetallic precipitate. With increasing deposition of semiconductor, the crystallites of intermetallic material continue to grow until they consume all of the metal in the liquid, at which point no liquid remains. Continuing deposition of semiconductor material results in the growth of filamentary crystallites of the semiconductor out of the intermetallic surface. The result is a columnar film of the semiconductor with a filamentary structure originating from the crystallites of intermetallic nucleating material.

    27.
    发明专利
    未知

    公开(公告)号：DE69332917T2

    公开(公告)日：2003-12-24

    申请号：DE69332917

    申请日：1993-02-01

    Applicant: IBM

    Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

    IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  C23C14/04

    Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

    Refractory metal capped low resistivity metal conductor lines and vias formed using pvd and cvd
    28.
    发明专利
    Refractory metal capped low resistivity metal conductor lines and vias formed using pvd and cvd 未知

    公开(公告)号：SG44450A1

    公开(公告)日：1997-12-19

    申请号：SG1996000500

    申请日：1993-02-01

    Applicant: IBM

    Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR DALAL M ,  HSU LOUIS L

    IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60

    Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

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