公开(公告)号：GB2574776A

公开(公告)日：2019-12-18

申请号：GB201914035

申请日：2018-02-21

Applicant: IBM

Inventor： YUN SEOG LEE ,  DEVENDRA SADANA ,  SOUZA DE

IPC: H01M10/058 ,  H01M4/64 ,  H01M10/0525

Abstract: A solid-state lithium-based battery is provided in which the formation of lithium islands (i.e., lumps) during a charging/recharging cycle is reduced, or even eliminated. Reduction or elimination of lithium islands (i.e., lumps) can be provided by forming a lithium nucleation enhancement liner between a lithium-based solid-state electrolyte layer and a top electrode of a solid-state lithium based battery.

公开(公告)号：GB2538348B

公开(公告)日：2019-06-05

申请号：GB201604084

申请日：2016-03-10

Applicant: IBM

Inventor： JIN CAI ,  NING LI ,  JEAN-OLIVIER PLOUCHART ,  DEVENDRA SADANA ,  TAK HUNG NING ,  EFFENDI LEOBANDUNG

IPC: H01S5/026 ,  G02B6/42 ,  G02B6/43 ,  H01L27/15

Abstract: After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate of a semiconductor-on-insulator (SOI) substrate, a dielectric waveguide material stack including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT, an NPN BJT or a pair of complementary PNP BJT and NPN BJT, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench.

公开(公告)号：GB2538594B

公开(公告)日：2017-11-22

申请号：GB201604088

申请日：2016-03-10

Applicant: IBM

Inventor： NING LI ,  DEVENDRA SADANA ,  EFFENDI LEOBANDUNG

IPC: H01L27/144 ,  B82Y20/00 ,  G02B6/12 ,  G02B6/13 ,  H01L21/70 ,  H01L21/84 ,  H01L25/16 ,  H01L27/04 ,  H01L27/092 ,  H01L27/15 ,  H01L31/0304 ,  H01L31/18 ,  H01S5/02 ,  H01S5/026

Abstract: A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device.

公开(公告)号：GB2545562A

公开(公告)日：2017-06-21

申请号：GB201620231

申请日：2016-11-29

Applicant: IBM

Inventor： WILLIAM THOMAS SPRATT ,  NING LI ,  DEVENDRA SADANA

IPC: G01N21/64

Abstract: A fluorescence detection system and method of use are disclosed. The system includes a light source 110 which emits excitation light; a sample unit 130 in which a sample is disposed; a first optical fiber 120 adapted to connect the light source to the sample unit; an avalanche photodiode array detector 140 which receives fluorescent light generated by the sample when the sample is irradiated with the excitation light; and a second optical fiber 150 adapted to connect the sample unit to the avalanche photodiode array detector (APD). The second optical fiber has a numerical aperture of equal to or greater than about 0.15 and is positioned such that its longitudinal axis is orthogonal to a longitudinal axis of the first optical fiber. A computer system including a processor and memory may also be included to receive and store sample information. The processor may select a photon-counting mode or a linear photomultiplier mode of operation for the detector. The sample unit may be a static unit, such as a cuvette, or a dynamic unit, such as a microfluidic channel.