公开(公告)号：GB2543420A

公开(公告)日：2017-04-19

申请号：GB201616634

申请日：2016-09-30

Applicant: IBM

Inventor： KENNETH PARKER RODBELL ,  MICHAEL GORDON ,  JENG-BANG YAU ,  TAK HUNG NING

IPC: H01L31/115 ,  G01T1/02 ,  H01L27/12 ,  H01L29/735 ,  H01L31/11 ,  H01L31/18

Abstract: A monolithic integrated radiation sensor or dosimeter (and manufacturing method) to detect environmental radiation (e.g ionizing radiation, neutrons) includes a sensing structure (e.g SOI insulating buried oxide layer, BOX 22) and first and second lateral bipolar junction transistors (BJT, LBJT) of opposite polarity (i.e NPN and PNP BJT devices). The first lateral BJT 30 (Q1) acts as the radiation sensor; its base 33 electrically coupled to the sensing structure 22 (e.g BOX 22 or upper oxide 132 fig 5) and produces an output signal as the stored charge changes within sensing structure. The second lateral BJT acts as an amplifier whilst the polarity is such that the ionizing effect is minimized. At least one of the lateral BJTs has an inverted (base) configuration (122 fig 2). The base of the second LBJT amplifier is electrically connected to an output of the first sensing lateral BJT (e.g base/collector). The doping concentration of the base of the second LBJT is higher (e.g by a factor of ten) than that of the base. The output of the first sensing BJT is configured to pass current directly into the base of the second lateral BJT, and the output (collector) of the second BJT corresponds to the output of the second amplifying BJT device. The integrated radiation sensor may include a neutron conversion layer within the buried oxide layer or an oxide layer on top of the LBJT sensor base.

公开(公告)号：DE3466138D1

公开(公告)日：1987-10-15

申请号：DE3466138

申请日：1984-06-08

Applicant: IBM

Inventor： MARASIPUR GUNDAPPA ANANTHA ,  TAK HUNG NING ,  PAUL JAMIN TSANG

IPC: H01L21/331 ,  H01L21/74 ,  H01L21/8222 ,  H01L21/8224 ,  H01L21/8228 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L29/735 ,  H01L29/72 ,  H01L27/08 ,  H01L21/00

Abstract: A high performance lateral transistor may be fabricated by first providing a monocrystalline semiconductor body having a principal surface and where the desired transistor is a PNP transistor, a buried N+ region with an N+ reach-through connecting the buried region to said principal surface. The collector region of the transistor is formed into the surface by blanket diffusing P type impurities into the desired region. An insulating layer is formed upon the top surface of the semiconductor body. An opening is made in the insulating layer where the groove or channel-emitter contact is desired. An etching of a substantially vertical walled groove into the monocrystalline semiconductor body using the patterned insulating layer as the etching mask. An N base diffusion is carried out to produce as N region around the periphery of the opening in the body. Oxygen is then ion implanted into the bottom of the groove to form a silicon dioxide region at the bottom of the groove. The P+ polycrystalline silicon layer is then formed on the surface which will in turn fill the groove with this material. The heating of the structure forms the P+ emitter region around the side edges of the P+ polycrystalline silicon filled groove. The P+ polycrystalline layer is the emitter contact, the N+ reach-through connected through the buried N+ region is the base contact and the collector contact is made to the P-type collector region.

公开(公告)号：GB2538348B

公开(公告)日：2019-06-05

申请号：GB201604084

申请日：2016-03-10

Applicant: IBM

Inventor： JIN CAI ,  NING LI ,  JEAN-OLIVIER PLOUCHART ,  DEVENDRA SADANA ,  TAK HUNG NING ,  EFFENDI LEOBANDUNG

IPC: H01S5/026 ,  G02B6/42 ,  G02B6/43 ,  H01L27/15

Abstract: After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate of a semiconductor-on-insulator (SOI) substrate, a dielectric waveguide material stack including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT, an NPN BJT or a pair of complementary PNP BJT and NPN BJT, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench.

公开(公告)号：IT1150096B

公开(公告)日：1986-12-10

申请号：IT2672180

申请日：1980-12-18

Applicant: IBM

Inventor： CROWDER BILLY LEE ,  ISAAC RANDALL DUANE ,  TAK HUNG NING

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/331 ,  H01L23/485 ,  H01L29/10 ,  H01L

公开(公告)号：GB2543420B

公开(公告)日：2020-01-01

申请号：GB201616634

申请日：2016-09-30

Applicant: IBM

Inventor： KENNETH PARKER RODBELL ,  MICHAEL GORDON ,  JENG-BANG YAU ,  TAK HUNG NING

IPC: H01L31/115 ,  G01T1/02 ,  H01L27/12 ,  H01L29/735 ,  H01L31/11 ,  H01L31/18

Abstract: An integrated radiation sensor for detecting the presence of an environmental material and/or condition includes a sensing structure and first and second lateral bipolar junction transistors (BJTs) having opposite polarities. The first lateral BJT has a base that is electrically coupled to the sensing structure and is configured to generate an output signal indicative of a change in stored charge in the sensing structure. The second lateral BJT is configured to amplify the output signal of the first bipolar junction transistor. The first and second lateral BJTs, the sensing structure, and the substrate on which they are formed comprise a monolithic structure.

公开(公告)号：GB2538348A

公开(公告)日：2016-11-16

申请号：GB201604084

申请日：2016-03-10

Applicant: IBM

Inventor： JIN CAI ,  NING LI ,  JEAN-OLIVIER PLOUCHART ,  DEVENDRA SADANA ,  TAK HUNG NING ,  EFFENDI LEOBANDUNG

IPC: H01S5/026 ,  G02B6/42 ,  G02B6/43 ,  H01L27/15

Abstract: After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate 10 of a semiconductor-on-insulator (SOI substrate 8, a dielectric waveguide material stack 22, 24, 26 including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT 30, an NPN BJT 40 or a pair of complementary PNP BJT 30 and NPN BJT 40, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench. An optoelectronic device, for example a laser diode 60 may be formed on top of the compound semiconductor buffer layer 58 and edge coupled to the dielectric waveguide 22, 24, 26.

公开(公告)号：SG100757A1

公开(公告)日：2003-12-26

申请号：SG200105829

申请日：2001-09-25

Applicant: IBM

Inventor： TAK HUNG NING

IPC: H01L21/331 ,  H01L27/12 ,  H01L29/08 ,  H01L29/73 ,  H01L21/8249 ,  H01L21/84 ,  H01L29/732

Abstract: A bipolar transistor structure is described incorporating an emitter, base, and collector having a fully depleted region on an insulator of a Silicon-On-Insulator (SOI) substrate without the need for a highly doped subcollector to permit the fabrication of vertical bipolar transistors on semiconductor material having a thickness of 300 nm or less and to permit the fabrication of SOI BiCMOS. The invention overcomes the problem of requiring a thick semiconductor layer in SOI to fabricate vertical bipolar transistors with low collector resistance.