公开(公告)号：IL297602A

公开(公告)日：2022-12-01

申请号：IL29760222

申请日：2022-10-24

Applicant: IBM ,  NING LI ,  DEVENDRA K SADANA

Inventor： NING LI ,  DEVENDRA K SADANA

IPC: G11C11/56 ,  G11C13/00 ,  H01L45/00

Abstract: According to some embodiments of the present invention a phase change device (PCD) has a first and second semiconductor layer. The first semiconductor layer made of a first semiconductor material and has a first semiconductor thickness, a first interface surface, and a first electrode surface. The first interface surface and first electrode surface are on opposite sides of the first semiconductor layer. The first semiconductor material can transition between a first amorphous state and a first crystalline state at one or more first conditions. The second semiconductor layer is made of a second semiconductor material and has a second semiconductor thickness, a second interface surface, and a second electrode surface. The second interface surface and second electrode surface are on opposite sides of the second semiconductor layer. The first interface surface and the second interface surface are in electrical, physical, and chemical contact with one another at an interface. The second semiconductor material can transition between a second amorphous state and a second crystalline state at one or more second conditions. A first electrode in physical and electrical contact with the first electrode surface of the first semiconductor layer and a second electrode in physical and electrical contact with the second electrode surface of the second semiconductor layer. The first conditions and second conditions are different. Therefore, in some embodiments, the first and second semiconductor materials can be in different amorphous and/or crystalline states. The layers can have split amorphous/crystalline states. By controlling how the layers are split, the PCD can be in different resistive states.

公开(公告)号：GB2605325A

公开(公告)日：2022-09-28

申请号：GB202208666

申请日：2020-11-20

Applicant: IBM

Inventor： NING LI ,  JOEL DE SOUZA ,  STEPHEN BEDELL ,  DEVENDRA SADANA

IPC: H01L45/00

Abstract: A bottom electrode(110) is deposited on top of a substrate(105). A dielectric material layer(115) is deposited on top of the bottom electrode(110). A hole is created in the dielectric material layer(115). A lift off layer(116) is spun on and baked on the dielectric material layer(115). A photoresist layer(117) is spun on and baked on the lift off layer(116). UV lithography is performed to create an opening above the hole in the dielectric material layer(115). An Ag layer(120) is deposited on top of the remaining patterned dielectric material layer and the photoresist layer(117). A Germanium Antimony Telluride (GST) layer(130) is deposited on top of the Ag layer(120). A top electrode(140) is deposited on top of the GST layer(130). The Ag layer(120), the GST layer(130) and the top electrode(140) located on top of the photoresist layer(117) along with the photoresist layer(117) and the lift off layer(116) are removed.

公开(公告)号：GB2600544A

公开(公告)日：2022-05-04

申请号：GB202113289

申请日：2021-09-17

Applicant: IBM

Inventor： NING LI ,  JOEL P DE SOUZA ,  KEVIN W BREW ,  DEVENDRA K SADANA

IPC: G11C11/56 ,  G11C13/00 ,  H01L45/00

Abstract: A Phase-Change Memory (PCM) device 102 comprising a dielectric layer 206, bottom electrode 204 in dielectric layer, a liner material 203 on bottom electrode, a phase-change material 202, 205 on the liner material and a top electrode 201 on the phase-change material and in the dielectric layer. The liner material and phase change material PCM may be in the dielectric layer. The liner material may comprise a conductive oxide thin film such as Al doped ZnO (AZO), doped indium oxide with tin (ITO) or doped metal oxide. Alternatively the liner material may comprise a metal layer formed of Aluminium Al only or Al disposed over a conductive oxide thin film (e.g Al doped ZnO (AZO)).The dielectric layer may comprise several dielectric layers. Electrodes may comprise of metal nitride (TaN, TiN, WN). A method of manufacture is included. Alternative phase-change memory includes first electrode and second on first and second side respectively of dielectric layer, the phase-change material on dielectric layer and first and second electrodes, and a liner material disposed on the phase-change material (figure 7). Figure 8 is another embodiment. The liner may reduce resistance drift acting as an inert or thermal cap further reducing heat loss.

公开(公告)号：GB2581114B

公开(公告)日：2021-01-27

申请号：GB202008788

申请日：2018-11-26

Applicant: IBM

Inventor： QING CAO ,  JIANSHI TANG ,  NING LI

IPC: H01L27/146 ,  G01J3/28 ,  H01L31/0224 ,  H01L31/101

Abstract: A vertically integrated multispectral imaging sensor includes a first metal contact layer on a substrate, an SiO2 layer on the first metal contact layer with a first detector element embedded in a hole therein, a first graphene layer that covers the first detector element, a second metal contact layer on the SiO2 layer on one side of the first graphene, an AlO3 layer on the SiO2 layer, in which a second detector element is embedded in a hole over the first graphene layer, a second graphene layer on the second detector element, and a third metal contact layer on the AlO3 layer adjacent to the second graphene layer. The first detector material is sensitive to a different wavelength band of the electromagnetic spectrum than the second detector material.

公开(公告)号：GB2585295A

公开(公告)日：2021-01-06

申请号：GB202013202

申请日：2019-01-15

Applicant: IBM

Inventor： HARIKLIA DELIGIANNI ,  KO-TAO LEE ,  NING LI ,  DEVENDRA SADANA

IPC: A61N5/06

Abstract: Probes include a probe body configured to penetrate biological tissue. High-efficiency light sources are positioned within the probe body. Each high-efficiency light source has a sufficiently intense light output to trigger a light- sensitive reaction in neighboring tissues and has a sufficiently low power output such that a combined heat output of multiple light sources does cause a disruptive temperature increase in the neighboring tissues.

公开(公告)号：GB2580827A

公开(公告)日：2020-07-29

申请号：GB202004615

申请日：2018-09-21

Applicant: IBM

Inventor： JOEL PEREIRA DE SOUZA ,  NING LI ,  YAO YAO ,  DEVENDRA SADANA ,  YUN SEOG LEE

IPC: H01L33/00

Abstract: A semiconductor device is formed using an n-type layer of Zinc Oxide, a p-type layer formed of a narrow bandgap material. The narrow bandgap material uses a group 3A element and a group 5A element. A junction is formed between the n-type layer and the p-type layer, the junction being operable as a heterojunction diode having a rectifying property at a temperature range, the temperature range having a high limit at room temperature.

公开(公告)号：GB2600544B

公开(公告)日：2023-01-11

申请号：GB202113289

申请日：2021-09-17

Applicant: IBM

Inventor： NING LI ,  JOEL P DE SOUZA ,  KEVIN W BREW ,  DEVENDRA K SADANA

IPC: G11C11/56 ,  G11C13/00

Abstract: A Phase-Change Memory (PCM) device includes a dielectric layer, a bottom electrode disposed in the dielectric layer, a liner material disposed on the bottom electrode, a phase-change material disposed on the liner material, and a top electrode disposed on the phase-change material and in the dielectric layer.

公开(公告)号：GB2605668A

公开(公告)日：2022-10-12

申请号：GB202114897

申请日：2021-10-19

Applicant: IBM

Inventor： KO-TAO LEE ,  SHAWN XIAOFENG DU ,  NING LI ,  XIN ZHANG

IPC: H01L21/20 ,  H01L21/033

Abstract: A dielectric layer is formed on a Si-based substrate 102 and portions of the dielectric layer are etched to form a crisscrossing grid pattern of remaining portions of the dielectric layer 104 and to expose the substrate in areas where the dielectric layer is removed. GaN-based layers are deposited on the substrate in growth areas between sidewalls of the remaining portions of the dielectric layer. Semiconductor devices may be formed on the GaN-based layers.

公开(公告)号：GB2585295B

公开(公告)日：2022-06-08

申请号：GB202013202

申请日：2019-01-15

Applicant: IBM

Inventor： HARIKLIA DELIGIANNI ,  KO-TAO LEE ,  NING LI ,  DEVENDRA SADANA

IPC: A61N5/06

Abstract: Probes include a probe body configured to penetrate biological tissue. High-efficiency light sources are positioned within the probe body. Each high-efficiency light source has a sufficiently intense light output to trigger a light-sensitive reaction in neighboring tissues and has a sufficiently low power output such that a combined heat output of multiple light sources does cause a disruptive temperature increase in the neighboring tissues.

公开(公告)号：GB2538348A

公开(公告)日：2016-11-16

申请号：GB201604084

申请日：2016-03-10

Applicant: IBM

Inventor： JIN CAI ,  NING LI ,  JEAN-OLIVIER PLOUCHART ,  DEVENDRA SADANA ,  TAK HUNG NING ,  EFFENDI LEOBANDUNG

IPC: H01S5/026 ,  G02B6/42 ,  G02B6/43 ,  H01L27/15

Abstract: After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate 10 of a semiconductor-on-insulator (SOI substrate 8, a dielectric waveguide material stack 22, 24, 26 including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT 30, an NPN BJT 40 or a pair of complementary PNP BJT 30 and NPN BJT 40, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench. An optoelectronic device, for example a laser diode 60 may be formed on top of the compound semiconductor buffer layer 58 and edge coupled to the dielectric waveguide 22, 24, 26.