公开(公告)号：DE69333604D1

公开(公告)日：2004-09-30

申请号：DE69333604

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：DE69332917D1

公开(公告)日：2003-05-28

申请号：DE69332917

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  C23C14/04

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：SG70044A1

公开(公告)日：2000-01-25

申请号：SG1997004071

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60 ,  H01L29/43 ,  H01L29/440 ,  H01L29/460 ,  H01L21/44 ,  H01L21/48 ,  H01L29/40

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：SG70043A1

公开(公告)日：2000-01-25

申请号：SG1997004069

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  HSU LOUIS L ,  DALAL HORMAZDYAR M

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60 ,  H01L29/43 ,  H01L29/440 ,  H01L29/460 ,  H01L21/44 ,  H01L21/48 ,  H01L29/40

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：CA2131668C

公开(公告)日：1999-03-02

申请号：CA2131668

申请日：1994-09-08

Applicant: IBM

Inventor： GALLI CAROL ,  HSU LOUIS L ,  OGURA SEIKI ,  SHEPARD JOSEPH F

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L27/08 ,  H01L21/31

Abstract: A shallow trench isolation structure is formed by a process having a reduced number of steps and thermal budget by filling trenches by liquid phase deposition of an insulating semiconductor oxide and heat treating the deposit to form a layer of high quality thermal oxide at an interface between the deposited oxide and the body of semiconductor material (e.g. substrate) into which the trench extends. This process yields an isolation structure with reduced stress and reduced tendency to develop charge leakage. The structure can be readily and easily planarized, particularly if a polish-stop layer is applied over the body of semiconductor material and voids and contamination of the deposited oxide are substantially eliminated by self-aligned deposition above the trench in the volume of apertures on a resist used to form the trench.

公开(公告)号：DE69333604T2

公开(公告)日：2005-09-15

申请号：DE69333604

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：DE69329663D1

公开(公告)日：2000-12-21

申请号：DE69329663

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：SG70045A1

公开(公告)日：2000-01-25

申请号：SG1997004072

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60 ,  H01L29/43 ,  H01L29/440 ,  H01L29/460 ,  H01L21/44 ,  H01L21/48 ,  H01L29/40

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：BR9405158A

公开(公告)日：1995-08-01

申请号：BR9405158

申请日：1994-12-20

Applicant: IBM

Inventor： GALLI CAROL ,  HSU LOUIS L ,  OGURA SEIKI ,  SHEPARD JOSEPH F

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L27/08

Abstract: A shallow trench isolation structure is formed by a process having a reduced number of steps and thermal budget by filling trenches by liquid phase deposition of an insulating semiconductor oxide and heat treating the deposit to form a layer of high quality thermal oxide at an interface between the deposited oxide and the body of semiconductor material (e.g. substrate) into which the trench extends. This process yields an isolation structure with reduced stress and reduced tendency to develop charge leakage. First, a trench (18) is formed in a silicon substrate (12) having a thin blanket layer (14) of a hard polish-stop material and a photo resist layer (16) (used to pattern the structure) formed thereon. A channel stop region (20) is formed as standard in the trench. Next, the trench is filled with SiO2 using liquid phase oxide deposition above the level of said thin layer. Then the photo resist layer is removed and the SiO2 fill (22) is planarized. Finally, the SiO2 fill is densified and during the thermal cycle, a thin layer (30) of thermal oxide is formed at the fill-substrate interface. The structure can be readily and easily planarized, and voids contamination of the deposited oxide are substantially eliminated by self-aligned deposition above the trench in the volume of apertures on the resist used to form the trench.

公开(公告)号：CA1277778C

公开(公告)日：1990-12-11

申请号：CA580776

申请日：1988-10-20

Applicant: IBM

Inventor： BEYER KLAUS D ,  HSU LOUIS L ,  SCHEPIS DOMINIC J ,  SILVESTRI VICTOR J

IPC: H01L21/205 ,  H01L21/76 ,  H01L21/762 ,  H01L21/20

Abstract: DEFECT FREE EPITAXIALLY GROWN SILICON AND METHOD OF PRODUCING SAME A method for forming epitaxial grown silicon structure having substantially defect free outer surfaces and resulting structure is provided. A silicon substrate is provided, on which an epitaxial silicon crystal is grown. The outer surface layer of the silicon epitaxially grown silicon crystal will contain defective material which is removed by oxidation of the outer layer to silicon dioxide. This removes the defect containing outer layer, creating a new outer layer which is substantially defect free.