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    Process for forming uniform and smooth surfaces
    1.
    发明授权
    Process for forming uniform and smooth surfaces 失效
    形成均匀和平滑表面的方法

    公开(公告)号：US3661636A

    公开(公告)日：1972-05-09

    申请号：US3661636D

    申请日：1970-04-22

    Applicant: IBM

    Inventor： GREEN JAMES M ,  SEDGWICK THOMAS O ,  SILVESTRI VICTOR J

    IPC: C30B25/02 ,  C23C13/00

    CPC classification number: C30B25/02 ,  Y10S148/026 ,  Y10S148/049 ,  Y10S148/05 ,  Y10S148/051 ,  Y10S148/115 ,  Y10S148/145

    Abstract: A method for forming uniform and smooth surfaces which can be used in any chemical vapor transport system and in general in any deposition system in which chemicals in a gas phase are reacted to cause deposition onto a substrate. A zone of operating conditions exists in which smooth uniform surfaces are obtained, while at the same time ridge growth and defect growth is minimized. By changing substrate temperature and the concentrations of input reactants, ridge growth and defect growth in deposited films are substantially reduced.

    Abstract translation: 用于形成均匀且光滑的表面的方法，其可用于任何化学气相输送系统中，并且通常在任何沉积系统中，其中气相中的化学物质反应以引起沉积在基底上。 存在操作条件的区域，其中获得光滑的均匀表面，同时脊生长和缺陷生长最小化。 通过改变衬底温度和输入反应物的浓度，沉积膜中的脊生长和缺陷生长显着减少。

    DEFECT FREE EPITAXIALLY GROWN SILICON AND METHOD OF PRODUCING SAME
    5.
    发明专利
    DEFECT FREE EPITAXIALLY GROWN SILICON AND METHOD OF PRODUCING SAME 未知

    公开(公告)号：CA1277778C

    公开(公告)日：1990-12-11

    申请号：CA580776

    申请日：1988-10-20

    Applicant: IBM

    Inventor： BEYER KLAUS D ,  HSU LOUIS L ,  SCHEPIS DOMINIC J ,  SILVESTRI VICTOR J

    IPC: H01L21/205 ,  H01L21/76 ,  H01L21/762 ,  H01L21/20

    Abstract: DEFECT FREE EPITAXIALLY GROWN SILICON AND METHOD OF PRODUCING SAME A method for forming epitaxial grown silicon structure having substantially defect free outer surfaces and resulting structure is provided. A silicon substrate is provided, on which an epitaxial silicon crystal is grown. The outer surface layer of the silicon epitaxially grown silicon crystal will contain defective material which is removed by oxidation of the outer layer to silicon dioxide. This removes the defect containing outer layer, creating a new outer layer which is substantially defect free.

    SEMICONDUCTOR DEVICE HAVING PAIRS OF VERTICAL COMPLEMENTARY BIPOLAR TRANSISTORS AND METHOD OF FABRICATION THEREFOR
    6.
    发明专利
    SEMICONDUCTOR DEVICE HAVING PAIRS OF VERTICAL COMPLEMENTARY BIPOLAR TRANSISTORS AND METHOD OF FABRICATION THEREFOR 未知

    公开(公告)号：DE3066684D1

    公开(公告)日：1984-03-29

    申请号：DE3066684

    申请日：1980-06-24

    Applicant: IBM

    Inventor： SILVESTRI VICTOR J ,  TANG DENNY D ,  WIEDMANN SIEGFRIED K

    IPC: H01L27/082 ,  G11C11/411 ,  H01L21/331 ,  H01L21/74 ,  H01L21/763 ,  H01L21/8226 ,  H01L21/8228 ,  H01L27/02 ,  H01L29/73 ,  H01L21/82 ,  G11C11/40

    Abstract: A vertical pair of complementary, bipolar transistors is disclosed which includes a semiconductor substrate of one conductivity type and a pair of dielectric isolation regions disposed in contiguous relationship with the substrate. An injector region of opposite conductivity type is disposed between the pair of isolation regions. A pair of heavily doped, polycrystalline, semiconductor regions of the one conductivity type is disposed over and in registry with the pair of isolation regions. Similarly, a single crystal, semiconductor region of the one conductivity type is disposed over and in registry with the injector region. Finally, a first zone of opposite conductivity type is disposed in the single crystal region and a second zone of the one conductivity type is disposed in the first zone. In addition, a method of manufacturing a semiconductor device having vertical complementary, bipolar transistors is disclosed which includes the steps of forming regions of dielectric isolation which are contiguous with a semiconductor substrate and a region of semiconductor of one conductivity type therebetween, the semiconductor substrate being of opposite conductivity type; forming regions of heavily doped, polycrystalline semiconductor of the opposite conductivity type and a region of single crystal semiconductor of the opposite conductivity type in registry with the regions of dielectric isolation and the semiconductor region of one conductivity type, respectively. The method also includes the step of forming a zone of one conductivity type in the region of single crystal semiconductor and a zone of opposite conductivity type in the zone of one conductivity type.

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