公开(公告)号：DE10228571A1

公开(公告)日：2004-01-22

申请号：DE10228571

申请日：2002-06-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： AMON JUERGEN ,  FAUL JUERGEN ,  SCHUSTER THOMAS ,  RUDER THOMAS

IPC: H01L21/60 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/04 ,  H01L29/10 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

Abstract: A semiconductor structure having a plurality of gate stacks on a semiconductor substrate provided with a gate dielectric. The gate stacks have a lower first layer made of polysilicon, an overlying second layer made of a metal silicide, and an upper third layer made of an insulating material, and a sidewall oxide on the sidewalls of the first and second layers. The sidewall oxide is thinned or removed on one of the sidewalls, and the gate stacks have sidewall spacers made of the insulating material.

公开(公告)号：DE10207740A1

公开(公告)日：2003-09-11

申请号：DE10207740

申请日：2002-02-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FAUL JUERGEN ,  ALSMEIER JOHANN

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/78 ,  H01L21/336

Abstract: Production of a p-channel field effect transistor on a semiconductor substrate (10) comprises doping the substrate with donators using a first implantation to form an n-doped sink (70), thermally oxidizing to form a thin oxide layer (30) on the surface of the substrate, depositing a first layer (40) made from an n-doped polysilicon, p-doping the first layer with boron or boron fluoride particles, lithographically projecting and etching to remove the first layer, doping the substrate with acceptors using a second implantation (140) to form a p-doped source region, and subjecting the substrate to an elevated temperature. Preferred Features: The step of p-doping the first layer with boron or boron fluoride is carried whilst the first layer is deposited. The first layer is p-doped using a third implantation after depositing the fist layer.

公开(公告)号：DE19941147A1

公开(公告)日：2001-03-22

申请号：DE19941147

申请日：1999-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TEMMLER DIETMAR ,  BENZINGER HERBERT ,  KARCHER WOLFRAM ,  PUSCH CATHARINA ,  SCHREMS MARTIN ,  FAUL JUERGEN

IPC: H01L21/20 ,  H01L21/8242 ,  H01L27/108

Abstract: Production of an epitaxial layer comprises: preparing substrate (105) having a single crystalline region (107) and an electrically insulated region (108); growing epitaxial layer (245) on the single crystalline region; and partially removing the epitaxial layer. Production of an epitaxial layer comprises: preparing substrate (105) having a single crystalline region (107) and an electrically insulated region (108); growing epitaxial layer (245) on the single crystalline region, in which the electrically insulated region is partially grown laterally by the epitaxial layer and forms an epitaxial closing joint (275); and partially removing the epitaxial layer above the electrically insulated region so that the epitaxial closing joint is partially removed. Preferred Features: The epitaxial layer is removed by anisotropic etching. The single crystalline region consists of silicon and the electrically insulated region consists of silicon oxide.