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公开(公告)号:DE10158307A1
公开(公告)日:2003-02-20
申请号:DE10158307
申请日:2001-11-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FRANKOWSKY GERD , HEDLER HARRY , MEYER THORSTEN , IRSIGLER ROLAND , VASQUEZ BARBARA
Abstract: Process for joining switching units arranged on a wafer comprises: applying the wafer on a film; cutting the film to divide the switching units without separating the film; stretching the film; and plugging the chambers between units. Process for joining switching units (101a-101n) arranged on a wafer (100) comprises: applying the wafer on film (102); cutting the film to divide switching units without separating the film; applying on a stretching device (103); stretching the film so that prescribed contacting distance is produced; and plugging the intermediate chambers between the switching units using casting composition (105) to produce modified wafer (101a).
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公开(公告)号:DE10120408A1
公开(公告)日:2002-10-31
申请号:DE10120408
申请日:2001-04-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WENNEMUTH INGO , HEDLER HARRY
IPC: H01L23/48 , H01L25/065 , H01L23/50 , H01L21/60 , H01L21/78
Abstract: An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connections being provided in the form of structured conductive tracks for providing an electrical connection from the active front face to the passive rear face. An electronic assembly formed of stacked semiconductor chips, and a method for producing the electronic component and the electronic assembly are also provided.
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公开(公告)号:DE10105351A1
公开(公告)日:2002-08-22
申请号:DE10105351
申请日:2001-02-05
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , MEYER THORSTEN , VASQUEZ BARBARA
IPC: H01L23/31 , H01L23/485 , H01L23/50 , H01L21/60
Abstract: Electronic component comprises semiconductor chip (3) with intermediate connecting structure (12). Connecting structure has wiring pattern (8) of conducting pathways arranged on insulating layer (7). Pattern is arranged below elastomeric protective layer (11) which has embedded elastomeric elements (10) arranged directly on insulating layer. Electronic component comprises a semiconductor chip (3) with an intermediate connecting structure (12) on its active surface (4). The connecting structure has a wiring pattern (8) of conducting pathways arranged on an insulating layer (7). The pattern is arranged below an elastomeric protective layer (11) which has embedded elastomeric elements (10) arranged directly on the insulating layer. The elastomeric elements protrude from the protective layer and are electrically connected to the conducting pathways. An independent claim is also included for a process for the production of an electronic component.
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公开(公告)号:DE10014300A1
公开(公告)日:2001-10-04
申请号:DE10014300
申请日:2000-03-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , MEYER THORSTEN
IPC: H01L21/56 , H01L21/60 , H01L23/485 , H01L23/50
Abstract: The invention relates to a semiconductor element, comprising a semiconductor chip which has at least one contact pad on a first main side and a protective layer which does not cover the at least one contact pad. The semiconductor element can be connected to a substrate by means of flip-chip contacting. Bumps are provided on the first main side, said bumps being at least partially connected to the at least one contact pad by printed conductors provided on the protective layer. The raised parts can be produced either with printable materials or by multiple galvanisation of the printed conductor ends lying opposite the contact pads.
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公开(公告)号:DE102006032251A1
公开(公告)日:2008-01-17
申请号:DE102006032251
申请日:2006-07-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor: MAYER THORSTEN , HEDLER HARRY , BRUNNBAUER MARKUS
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公开(公告)号:SG129252A1
公开(公告)日:2007-02-26
申请号:SG200304497
申请日:2003-08-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , MEYER THORSTEN , VASQUEZ BARBARA
IPC: H01L21/027 , H01L21/50 , H01L21/60 , H01L23/485 , H01L23/498
Abstract: The present invention provides a method for producing a semiconductor device, with the steps of: applying an interconnect level (11, 12) to a semiconductor substrate (10); structuring the interconnect level (12); and applying a solder layer (13) on the structured interconnect level (11, 12) in such a way that the solder layer
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公开(公告)号:DE10103186B4
公开(公告)日:2007-01-18
申请号:DE10103186
申请日:2001-01-24
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , ROEMER BERND
Abstract: An electronic component includes a semiconductor chip that has an active upper side with integrated circuits and a passive rear side. The rear side and the side border regions of the semiconductor chip also form the outer package sides of the electronic component. At least the corner regions and the edge regions of the rear side and the side border regions of the semiconductor chip have a plastic coating with a thickness in the micrometer range. Furthermore, the invention relates to a method of producing such an electronic component.
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公开(公告)号:DE10345395B4
公开(公告)日:2006-09-14
申请号:DE10345395
申请日:2003-09-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , MEYER THORSTEN , IRSIGLER ROLAND
IPC: H01L23/50 , H01L23/14 , H01L23/29 , H01L23/31 , H01L23/485 , H01L23/498 , H01L27/108
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公开(公告)号:DE102004037610B3
公开(公告)日:2006-03-16
申请号:DE102004037610
申请日:2004-08-03
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , LEGEN ANTON
Abstract: The method involves planning a flexible intermediate layer (5) on an integrated circuit (1) and or a substrate (10). The flexible layer (5) is structured in raised and lower ranges (5a, 5b). The ranges are structured in such a manner that they have a variable width. The substrate and the integrated circuit are connected by the structured flexible intermediate layer (5). The width of the raised ranges (5a) is selected in such a manner, that it decreases on the basis of a center line CL of the integrated circuit (1) to the edge. The connection directly takes place directly, or indirectly by providing a glue layer (15) lying between them. An independent claim is included for a switching configuration with an integrated circuit and with a substrate.
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公开(公告)号:DE10238582B4
公开(公告)日:2006-01-19
申请号:DE10238582
申请日:2002-08-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HEDLER HARRY , MEYER THORSTEN
IPC: H01L21/60 , H01L21/66 , H01L23/485 , H01L23/498 , H01L23/50
Abstract: Integrated circuit comprises an elastically deformable protrusion (11) on a switching substrate (10), a contact unit (13) arranged on the protrusion for producing an electrical connection, and a rewiring unit (12, 14, 15) for electrically connecting an active semiconductor section of the integrated circuit to the contact unit. The rewiring unit is formed as a ring around the protrusion at the foot of the protrusion and in electrical connection with the contact unit. An Independent claim is also included for a process for the production of a composite made from a tested integrated circuit and an electrical unit.
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