公开(公告)号：DE102006044836A1

公开(公告)日：2008-04-03

申请号：DE102006044836

申请日：2006-09-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEITZER LUDWIG ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL

IPC: H01L23/552 ,  H01L21/50 ,  H01L23/34 ,  H01L25/065

Abstract: The module (100) has a shielding unit (11) provided on a principal surface (12) of a high frequency chip (10), by a bond and comprising a welding contact (13) e.g. laser beam welding contact. The shielding unit is arranged in a vicinity of the chip. An insulation layer is arranged between the surface and the shielding unit, and the chip is provided on a carrier. The shielding unit is connected with the carrier by a connecting cable i.e. bonding wire. The chip is connected with the shielding unit and/or a heat dissipation unit by the bond. An independent claim is also included for a method for manufacturing a shielding and heat dissipation units combined module.

公开(公告)号：DE102006033864A1

公开(公告)日：2008-02-21

申请号：DE102006033864

申请日：2006-07-21

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEITZER LUDWIG ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL

IPC: H01L23/495

Abstract: An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an encapsulation and composed of at least one semiconductor element on an element carrier, at least one leadframe with at least one inner contact-connection, at least one inner lead running within the encapsulation, and at least one outer contact-connection led out from the encapsulation. The inner lead has an exposed inner lead section which can be contact-connected from the outer side of the package-in-package configuration.

公开(公告)号：DE102006033701A1

公开(公告)日：2008-01-31

申请号：DE102006033701

申请日：2006-07-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  STUEMPFL CHRISTIAN ,  HEITZER LUDWIG

IPC: H01L21/60 ,  H01L23/50

Abstract: A method for producing an electronic component of a VQFN (very thin quad flat pack no-lead) design includes the following method steps: anchoring at least one integrated circuit element on a sacrificial substrate; contact-connecting the at least one integrated circuit element to the sacrificial substrate with formation of contact-connecting points on the sacrificial substrate; forming an encapsulation on a top side of the sacrificial substrate, the at least one anchored integrated circuit element being mounted on the top side of the sacrificial substrate; removing the sacrificial substrate, thereby uncovering a portion of the contact-connecting points on the underside of the encapsulation.

公开(公告)号：DE10142118B4

公开(公告)日：2007-07-12

申请号：DE10142118

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L25/065 ,  H01L23/50

Abstract: An electronic component has a carrier substrate to accommodate two semiconductor chips that are connected to each other. The second semiconductor chip rests with two opposite marginal supporting regions on an upper side of the carrier substrate. The first semiconductor chip is disposed at a distance from a frame of the carrier substrate, in a central recess in the latter. A process for the production of the electronic component is further described.

公开(公告)号：DE102005038956B3

公开(公告)日：2007-03-22

申请号：DE102005038956

申请日：2005-08-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  STROBEL PETER ,  POHL JENS ,  STUEMPFL CHRISTIAN ,  HEITZER LUDWIG

IPC: H01L21/58

Abstract: Coating wafer level package structure (1) with a semiconductor chip (4) comprises applying coating particles (5) on a substrate (6), electrostatic charging of the substrate and the particles, and liquefying the particles by heating the coating particles surface (7). The structure is electrostaticlly charged with chip to a polarity opposite to that of the substrate. The substrate and structure are moved in the direction of the surface of the coated structure until the coating particles jump on to the surface of the coated structure and cling on to it. The coating wafer level package structure (1) with semiconductor chip (4), comprises applying coating particles (5) on a substrate (6), electrostatic charging of substrate and the particles, and liquefying the particles by heating coating particles surface (7). The structure is electrostaticlly charged with chip to a polarity opposite to that of the substrate. The substrate and structure are moved in the direction of the surface of the coated structure until the coating particles jump on to the surface of the coated structure and cling on to it. Nano-particles, filled polymers, metals, and organometallic compounds are used as coating particles. The wafer level package exhibits a multiplicity of semiconductor chips that lie at the same level and plastic regions that are present between the semiconductor chips. Another substrate with straticulated semiconductor chips is electrostatically charged. The electrically conducting surfaces of the structure are coated with an adhesion mediator layer during the preparation of the electrostatic separation. A metal-coated plate is used as the substrate. The substrate is aligned horizontally with its side exhibiting the coating particles. A multi-layer coating is led over substrates with different coating particles. A melting up of the coating particles takes place between each run of coating.

公开(公告)号：DE10243947B4

公开(公告)日：2007-02-01

申请号：DE10243947

申请日：2002-09-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L23/50 ,  H01L21/60 ,  H01L23/31 ,  H01L23/49

Abstract: The electronic component (2) comprises a flat chip carrier (6) assigned to a semiconductor chip (4). The contact areas (43) on active chip surface (41) and the contact terminal areas (63) on an upper side (61) of the chip carrier, are formed by elastic strips (81) of material that can undergo microstructuring. The strips are provided with an electrically conductive coating. An Independent claim is also included for electronic component manufacturing method.

公开(公告)号：DE10240460A1

公开(公告)日：2004-03-11

申请号：DE10240460

申请日：2002-08-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/58 ,  H01L21/60 ,  H01L25/065

公开(公告)号：DE10133791A1

公开(公告)日：2003-02-06

申请号：DE10133791

申请日：2001-07-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GROENINGER HORST ,  OFNER GERALD ,  STUEMPFL CHRISTIAN

IPC: H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H01L23/50 ,  H01L21/60

Abstract: The invention relates to electronic components provided with wiring plate (2) for connection to other components. To form the contact pads required the invention proposes that connection pads in the form of solder balls (12) be offered up to the wiring plate in a jig (8) for soldering to the connection tracks.

公开(公告)号：DE102019119233A1

公开(公告)日：2020-01-16

申请号：DE102019119233

申请日：2019-07-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ABD HAMID SYAHIR ,  KRISHNAN JAGEN ,  LAM MIAN MIAN ,  NARAYANASAMY JAYAGANASAN ,  SCHNOY FABIAN ,  STOEK THOMAS ,  STUEMPFL CHRISTIAN

IPC: H01L23/36 ,  C25D7/12 ,  H01L21/50 ,  H01L23/495

Abstract: Ein Verfahren zum Bilden einer Halbleitervorrichtung beinhaltet das Bereitstellen eines Halbleitergehäuses, das einen elektrisch isolierenden Formverbundkörper, einen Halbleiterchip, der durch den Formverbundkörper verkapselt ist, eine Vielzahl von elektrisch leitfähigen Leitungen, die jeweils aus dem Formverbundkörper herausragen, und einen metallischen Wärmeleitblock umfasst, wobei der metallische Wärmeleitblock eine Rückseite umfasst, die am Formverbundkörper freiliegt, Beschichten der äußeren Abschnitte der Leitungen, die vom Formverbundkörper freiliegen, mit einer Metallbeschichtung, und nach Abschluss der Beschichtung der äußeren Abschnitte der Leitungen, Bereitstellen einer planaren metallischen Kühlkörper-Grenzfläche auf der Halbleitervorrichtung, die am Formverbundkörper freiliegend und im Wesentlichen frei von der Metallbeschichtung ist.

公开(公告)号：DE102006044836B4

公开(公告)日：2012-08-30

申请号：DE102006044836

申请日：2006-09-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEITZER LUDWIG ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL

IPC: H01L23/42 ,  H01L21/50 ,  H01L23/367 ,  H01L23/552 ,  H01L25/065

Abstract: Modul (400; 500; 600; 700; 800) umfassend – einen Träger (25), – ein auf dem Träger (25) angeordnetes erstes Bauelement (20) und ein zweites Bauelement (21), welche übereinander gestapelt sind, und – ein Wärmeableitungselement (22), welches zumindest teilweise zwischen dem ersten und dem zweiten Bauelement (20, 21) angeordnet ist und welches mindestens eine frei liegende Oberfläche (23) aufweist, wobei das erste Bauelement (20) und das zweite Bauelement (21) zumindest teilweise mit einem Vergussmaterial (24) umhüllt sind und die mindestens eine frei liegende Oberfläche (23) des Wärmeableitungselements (22) dazu vorgesehen ist, an eine Wärmesenke gekoppelt zu werden und wobei das Wärmeableitungselement (22) von dem Träger (25) thermisch entkoppelt ist.