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    Interposer with conductive routing exposed on sidewalls
    23.
    发明授权
    Interposer with conductive routing exposed on sidewalls 有权

    公开(公告)号：US10651102B2

    公开(公告)日：2020-05-12

    申请号：US15778410

    申请日：2015-12-18

    Applicant: Intel IP Corporation

    Inventor： Klaus Reingruber ,  Christian Geissler ,  Georg Seidemann ,  Sonja Koller

    IPC: H01L23/48 ,  H01L23/13 ,  H01L23/12 ,  H01L23/498 ,  H05K3/40 ,  H05K1/18

    Abstract: An electronic assembly that includes an electronic component; and an interposer that includes a body having upper and lower surfaces and side walls extending between the upper and lower surfaces, the interposer further including conductive routings that are exposed on at least one of the side walls, wherein the electronic component is connected directly to the interposer. The conductive routings are exposed on each side wall and on the upper and lower surfaces. The electronic assembly may further includes a substrate having a cavity such that the interposer is within the cavity, wherein the cavity includes sidewalls and substrate includes conductive traces that are exposed from the sidewalls of the cavity, wherein the conductive traces that are exposed from the sidewalls of the cavity are electrically connected directly to the conductive routings that are exposed on at least one of the side walls of the interposer.

    Advanced node cost reduction by ESD interposer
    24.
    发明授权
    Advanced node cost reduction by ESD interposer 有权

    公开(公告)号：US10446541B2

    公开(公告)日：2019-10-15

    申请号：US15743996

    申请日：2015-09-14

    Applicant: Intel IP Corporation

    Inventor： Georg Seidemann ,  Christian Geissler ,  Klaus Reingruber

    IPC: H01L23/48 ,  H01L27/02 ,  H01L23/60 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L49/02 ,  H01L25/10 ,  H01L23/14 ,  H01L23/498

    Abstract: An apparatus including an electrostatic discharge circuit including a first circuit portion coupled beneath a die contact pad of an integrated circuit die and a second circuit portion in an interposer separate from the integrated circuit die, the interposer including a first contact point coupled to the contact pad of the integrated circuit die and a second contact point operable for connection to an external source. A method including forming an integrated circuit die including a first electrostatic discharge structure beneath a contact pad of the die; and coupling the die to an interposer including an interposer contact and a second electrostatic discharge structure, wherein a signal at the contact pad of the die is operable to be routed through the interposer.

    INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS
    27.
    发明申请
    INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS 审中-公开

    公开(公告)号：US20190109120A1

    公开(公告)日：2019-04-11

    申请号：US16215449

    申请日：2018-12-10

    Applicant: Intel IP Corporation

    Inventor： Georg Seidemann ,  Klaus Reingruber

    IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498

    Abstract: IC package assemblies including a molding compound in which an IC chip surface is recessed relative to the molding compound. Thickness of the IC chip may be reduced relative to its thickness during the molding process. Another IC chip, heat spreader, etc. may then occupy the resultant recess framed by the molding compound to achieve a fine stacking pitch. In some embodiments, a package-on-package (PoP) assembly includes a center-molded IC chip flip-chip-bonded to a first package substrate. A second substrate to which a second IC chip is flip-chip bonded is then electrically coupled to the first substrate by through-molding vias. Within the PoP assembly, the second IC chip may be disposed back-to-back with the center-molded IC chip so as to occupy the recess framed by the molding compound.

    Device with switchable heat path
    29.
    发明授权
    Device with switchable heat path 有权

    公开(公告)号：US10091866B2

    公开(公告)日：2018-10-02

    申请号：US15386905

    申请日：2016-12-21

    Applicant: Intel IP Corporation

    Inventor： Sonja Koller ,  Georg Seidemann ,  Vishnu Prasad

    IPC: H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K5/02 ,  H05K7/20 ,  H05K9/00 ,  G06F1/20

    Abstract: Discussed generally herein are devices that include a switchable heat path. A device can include a device skin, a circuit board, a plurality of components on the circuit board, and a switchable heat path situated between the components and the device skin, the switchable heat path configured to be switched between an on state and an off state, the switchable heat path configured to conduct a first amount of heat from the components to the device skin when in the on state and configured to conduct a second, lesser amount of heat from the components to the device skin when in an off state.

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