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    21.
    发明专利
    未知

    公开(公告)号：FR2881851B1

    公开(公告)日：2007-04-13

    申请号：FR0550366

    申请日：2005-02-08

    Applicant: ST MICROELECTRONICS SA ,  UNIV D AIX MARSEILLE I

    Inventor： MALHERBE ALEXANDRE ,  KUSSENER EDITH ,  TALENDRO VINCENT

    IPC: G06F1/00 ,  G06K19/073

    Abstract: The circuit has a linear regulator (4`) for supplying a DC supply voltage (Vdd) to an internal load (29) from an external voltage (Vps). Chopper type capacitive clipping supply circuits (5), with switched capacitances, are in parallel with the activated linear regulator. The circuits supply current at the same time as the linear regulator, during an operation phase (D) of the integrated circuit which corresponds to a phase in which a calculating processor which contains the internal load is active.. An independent claim is also included for a method for scrambling the current signature of a load including an integrated circuit.

    23.
    发明专利
    未知

    公开(公告)号：FR2817361A1

    公开(公告)日：2002-05-31

    申请号：FR0015309

    申请日：2000-11-28

    Applicant: ST MICROELECTRONICS SA

    Inventor： MALHERBE ALEXANDRE ,  MARINET FABRICE

    IPC: G06F7/58 ,  G06K19/073 ,  H03K3/84 ,  G06K19/07

    Abstract: Random signal generator comprises an MOS transistor as an electronic noise source. The MOS transistor is operated with a drain source current having a random component and has means for producing a binary random signal from the random drain source current. The current channel is arranged to be curved or S shaped by suitable doping. The invention also relates to an integrated circuit with a binary signal generator based on an MOS transistor. The circuit has suitable connections for connecting to other circuits. An Independent claim is made for a method for generating a random signal from an electronic noise source, in which an MOS transistor with an S or screw shaped channel is used.

    24.
    发明专利
    未知

    公开(公告)号：FR2804521B1

    公开(公告)日：2002-04-05

    申请号：FR0001061

    申请日：2000-01-27

    Applicant: ST MICROELECTRONICS SA

    Inventor： POMET ALAIN ,  MALHERBE ALEXANDRE ,  MARINET FABRICE

    IPC: G06F13/42 ,  G06K19/07 ,  G06F1/04 ,  H04L7/00 ,  H03L7/00

    Abstract: A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one phase is used as a reference and is applied to the counter. It is thus possible to count the number of entire reference clock signal periods between a first pulse and a second pulse received from the bus. In reading the state of the phases in the oscillator upon reception of the second pulse, a determination is made for a current phase corresponding to the phase delay between the reference clock signal and the second pulse of the bus. By using a regeneration device that also includes a ring oscillator and a counter, it is possible to regenerate the clock signal of the bus with high precision.

    26.
    发明专利
    未知

    公开(公告)号：DE60128608D1

    公开(公告)日：2007-07-12

    申请号：DE60128608

    申请日：2001-01-24

    Applicant: ST MICROELECTRONICS SA

    Inventor： POMET ALAIN ,  MALHERBE ALEXANDRE ,  MARINET FABRICE

    IPC: G06F13/42 ,  G06K19/07

    Abstract: A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one phase is used as a reference and is applied to the counter. It is thus possible to count the number of entire reference clock signal periods between a first pulse and a second pulse received from the bus. In reading the state of the phases in the oscillator upon reception of the second pulse, a determination is made for a current phase corresponding to the phase delay between the reference clock signal and the second pulse of the bus. By using a regeneration device that also includes a ring oscillator and a counter, it is possible to regenerate the clock signal of the bus with high precision.

    27.
    发明专利
    未知

    公开(公告)号：DE60128314D1

    公开(公告)日：2007-06-21

    申请号：DE60128314

    申请日：2001-11-12

    Applicant: ST MICROELECTRONICS SA

    Inventor： MARINET FABRICE ,  MALHERBE ALEXANDRE

    IPC: H03K3/84 ,  G06F7/58 ,  G06K19/073

    Abstract: Random signal generator comprises an MOS transistor as an electronic noise source. The MOS transistor is operated with a drain source current having a random component and has means for producing a binary random signal from the random drain source current. The current channel is arranged to be curved or S shaped by suitable doping. The invention also relates to an integrated circuit with a binary signal generator based on an MOS transistor. The circuit has suitable connections for connecting to other circuits. An Independent claim is made for a method for generating a random signal from an electronic noise source, in which an MOS transistor with an S or screw shaped channel is used.

    ONE-TIME PROGRAMMABLE MEMORY CELL
    29.
    发明专利
    ONE-TIME PROGRAMMABLE MEMORY CELL 未知

    公开(公告)号：AU2003226880A1

    公开(公告)日：2003-09-04

    申请号：AU2003226880

    申请日：2003-02-11

    Applicant: ST MICROELECTRONICS SA

    Inventor： BARDOUILLET MICHEL ,  RIZZO PIERRE ,  MALHERBE ALEXANDRE ,  WUIDART LUC

    IPC: G06F21/06 ,  G11C16/22 ,  G11C17/14 ,  H01L27/10

    Abstract: The invention relates to a memory cell with a binary value consisting of two parallel branches. Each of said branches comprises: at least one polycrystalline silicon programming resistor (Rp 1 , Rp 2 ), which is connected between a first supply terminal ( 1 ) and a point or terminal for the differential reading ( 4, 6 ) of the memory cell state; and at least one first switch (MNP 1 , MNP 2 ) which, during programming, connects one of said read terminals to a second supply terminal ( 2 ).

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