-
公开(公告)号:DE69726718T2
公开(公告)日:2004-10-07
申请号:DE69726718
申请日:1997-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: FERRARI PAOLO , VIGNA BENEDETTO , MONTANINI PIETRO , FERRERA MARCO
IPC: G01P9/04 , B81B3/00 , G01C19/56 , G01P15/08 , G01P15/125 , H01L21/762 , H01L21/764 , H01L41/08
Abstract: To increase the sensitivity of the sensor, the movable mass (40) forming the seismic mass is formed starting from the epitaxial layer (13) and is covered by a weighting region of tungsten (26c) which has high density. To manufacture it, buried conductive regions (2) are formed in the substrate (1); then, at the same time, a sacrificial region is formed in the zone where the movable mass is to be formed and oxide insulating regions (9a-9d) are formed on the buried conductive regions (2) so as to cover them partially; the epitaxial layer (13) is then grown, using a nucleus region; a tungsten layer (26) is deposited and defined and, using a silicon carbide layer (31) as mask, the suspended structure (40) is defined; finally the sacrificial region is removed, forming an air gap (38).
-
22.
公开(公告)号:ITMI20072341A1
公开(公告)日:2009-06-15
申请号:ITMI20072341
申请日:2007-12-14
Applicant: ST MICROELECTRONICS SRL
Inventor: CROCE GIUSEPPE , MONTANINI PIETRO , MOTTURA MARTA
-
公开(公告)号:ITMI20051280A1
公开(公告)日:2007-01-07
申请号:ITMI20051280
申请日:2005-07-06
Applicant: ST MICROELECTRONICS SRL
Inventor: MARTINI FRANCESCO , MONTANINI PIETRO
-
公开(公告)号:DE69828486D1
公开(公告)日:2005-02-10
申请号:DE69828486
申请日:1998-04-03
Applicant: ST MICROELECTRONICS SRL
Inventor: MONTANINI PIETRO , VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/3065 , H01L21/762
-
公开(公告)号:DE69817518D1
公开(公告)日:2003-10-02
申请号:DE69817518
申请日:1998-04-30
Applicant: ST MICROELECTRONICS SRL
Inventor: MONTANINI PIETRO , FERRERA MARCO , CASTOLDI LAURA , GELMI ILARIA
IPC: H01L21/306 , B81B3/00 , B81C1/00 , G01C19/56 , G01L9/00 , G01P15/08 , G01P15/097 , G01P15/10 , G01P15/125 , H01L21/762 , H01L21/764 , H01L49/00
Abstract: The method is based on the use of a silicon carbide mask for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region (6) of silicon oxide on a substrate (1) of semiconductor material; growing a pseudo-epitaxial layer (8); forming an electronic circuit (10-13, 18); depositing a silicon carbide layer (21); defining photolithographycally the silicon carbon layer so as to form an etching mask (23) containing the topography of a microstructure (27) to be formed; with the etching mask (23), forming trenches (25) in the pseudo-epitaxial layer (8) as far as the sacrificial region (6) so as to laterally define the microstructure; and removing the sacrificial region (6) through the trenches (25).
-
-
-
-