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公开(公告)号:DE60032772D1
公开(公告)日:2007-02-15
申请号:DE60032772
申请日:2000-09-27
Applicant: ST MICROELECTRONICS SRL
Inventor: BARLOCCHI GABRIELE , VILLA FLAVIO
Abstract: Integrated microreactor, formed in a monolithic body (50) and including a semiconductor material region (2, 23) and an insulating layer (25, 30); a buried channel (21) extending in the semiconductor material region; a first and a second access trench (40a, 40b) extending in the semiconductor material region (2, 23) and in the insulating layer (25, 30), and in communication with the buried channel (21); a first and a second reservoir (41a, 41b) formed on top of the insulating layer (25, 30) and in communication with the first and the second access trench; a suspended diaphragm (45) formed by the insulating layer (25, 30), laterally to the buried channel (21); and a detection electrode (28), supported by the suspended diaphragm (45), above the insulating layer (25, 30), and inside the second reservoir.
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公开(公告)号:DE60023464D1
公开(公告)日:2005-12-01
申请号:DE60023464
申请日:2000-06-05
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , MASTROMATTEO UBALDO , BARLOCCHI GABRIELE , CATTANEO MAURO
Abstract: The microreactor is completely integrated and is formed by a semiconductor body (2) having a surface (4) and housing at least one buried channel (3) accessible from the surface of the semiconductor body (2) through two trenches (21a, 21b). A heating element (10) extends above the surface (4) over the channel (3) and a resist region (18) extends above the heating element and defines an inlet reservoir and an outlet reservoir (19, 20). The reservoirs (19, 20) are connected to the trenches (21a, 21b) and have, in cross-section, a larger area than the trenches. The outlet reservoir (20) has a larger area than the inlet reservoir (19). A sensing electrode (12) extends above the surface (4) and inside the outlet reservoir (20).
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公开(公告)号:DE69826233D1
公开(公告)日:2004-10-21
申请号:DE69826233
申请日:1998-01-13
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/762 , H01L21/00
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公开(公告)号:DE69816713T2
公开(公告)日:2004-04-22
申请号:DE69816713
申请日:1998-05-22
Applicant: ST MICROELECTRONICS SRL
Inventor: SAX HERBERT , MURARI BRUNO , VILLA FLAVIO , VIGNA BENEDETTO , FERRARI PAOLO
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公开(公告)号:DE69627645T2
公开(公告)日:2004-02-05
申请号:DE69627645
申请日:1996-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: VIGNA BENEDETTO , FERRARI PAOLO , VILLA FLAVIO
Abstract: The pressure sensor is integrated in a SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements (10) and the electronic components (4, 6-8) integrated in the same chip, trenches (26) are formed in the upper wafer (23) of the substrate and extending from the surface to the layer of insulating material (22); the layer of insulating material (22) is chemically etched through the trenches (26) to form an opening (31) beneath the diaphragm (27); and a dielectric layer (25) is deposited to outwardly close the trenches (26) and the opening (31). Thus, the process is greatly simplified, and numerous packaging problems eliminated.
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公开(公告)号:DE69930099T2
公开(公告)日:2006-08-31
申请号:DE69930099
申请日:1999-04-09
Applicant: ST MICROELECTRONICS SRL
Inventor: BARLOCCHI GABRIELE , VILLA FLAVIO
IPC: H01L21/764 , H01L21/20 , H01L21/306 , H01L21/308 , H01L21/762
Abstract: The method allows formation of buried cavities in a wafer (25) of monocrystalline semiconductor material. Initially, at least one cavity (21) is formed in a substrate (10) of monocrystalline semiconductor material, by timed TMAH etching silicon, then the cavity is covered with a material inhibiting epitaxial growth (22); finally, a monocrystalline epitaxial layer (26) is grown above the substrate (10) and the cavities (21). Thereby, the cavity (21) is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane (52). The original wafer (25) must have a plurality of elongate cavities or channels (21), parallel and adjacent to one another. Trenches (44) are then excavated in the epitaxial layer (26), as far as the channels (21), and the dividers between the channels are removed by timed TMAH etching.
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公开(公告)号:DE69828486D1
公开(公告)日:2005-02-10
申请号:DE69828486
申请日:1998-04-03
Applicant: ST MICROELECTRONICS SRL
Inventor: MONTANINI PIETRO , VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/3065 , H01L21/762
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公开(公告)号:DE69626972T2
公开(公告)日:2004-01-08
申请号:DE69626972
申请日:1996-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: FERRARI PAOLO , FORONI MARIO , VIGNA BENEDETTO , VILLA FLAVIO
Abstract: The acceleration sensor is formed in a monocrystalline silicon wafer (4) forming part of a dedicated SOI substrate (50) presenting a first (1) and second (4) monocrystalline silicon wafer separated by an insulating layer (2) having an air gap (3). A well (15) is formed in the second wafer (4), over the air gap (3), and is subsequently trenched up to the air gap to release the monocrystalline silicon mass (23) forming the movable mass (24) of the sensor; the movable mass (24) has two numbers of movable electrodes (28a, 28b) facing respective pluralities of fixed electrodes (29a, 29b). In the idle condition, each movable electrode (28) is separated by different distances from the two fixed electrodes (29) facing the movable electrode.
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公开(公告)号:ITTO20010392D0
公开(公告)日:2001-04-23
申请号:ITTO20010392
申请日:2001-04-23
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE , TORCHIA MANLIO GENNARO , MASTROMATTEO UBALDO
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公开(公告)号:DE69326340D1
公开(公告)日:1999-10-14
申请号:DE69326340
申请日:1993-09-27
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO
IPC: H01L21/331 , H01L29/10 , H01L29/73 , H01L29/732 , H01L29/735
Abstract: A low-noise transistor comprising a cutoff region (38; 47) laterally surrounding the emitter region (36; 45) in the surface portion of the transistor and of such conductivity as to practically turn off the surface portion of the transistor, so that the transistor operates mainly in the bulk portion. In the NPN transistor, the cutoff region is formed by a P ring (38) in a P type well region (35), and, in the PNP transistor, by the N type enriched base region (47) between the emitter region (45) and the collector region (49).
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