公开(公告)号：DE69626631T2

公开(公告)日：2003-11-06

申请号：DE69626631

申请日：1996-06-05

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  CAPPELLETTI PAOLO ,  TORELLI GUIDO

IPC: G11C16/02 ,  G11C11/56

公开(公告)号：DE69626631D1

公开(公告)日：2003-04-17

申请号：DE69626631

申请日：1996-06-05

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  CAPPELLETTI PAOLO ,  TORELLI GUIDO

IPC: G11C16/02 ,  G11C11/56

公开(公告)号：DE69526336D1

公开(公告)日：2002-05-16

申请号：DE69526336

申请日：1995-04-28

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  GASTALDI ROBERTO ,  TELECCO NICOLA ,  TORELLI GUIDO

IPC: G11C11/419 ,  G11C7/06 ,  G11C11/00

Abstract: A reading device for devices with memory cells with two branches each comprising, connected in cascade, an electronic switch (T3, T4), an active element (T1, T2) reactively connected to the active element of the other branch, between them to form a voltage amplifier. Each active element is controlled by means of a high impedance circuit element (DL, DR). A microswitch (TE) which connects the two branches together is inserted between the two active elements (1, 2).

公开(公告)号：DE69726136T2

公开(公告)日：2004-08-26

申请号：DE69726136

申请日：1997-08-29

Applicant: ST MICROELECTRONICS SRL

Inventor： ROLANDI PAOLO ,  GASTALDI ROBERTO ,  CALLIGARO CRISTIANO

IPC: G11C11/56 ,  G11C16/08 ,  G11C16/30 ,  G11C11/00 ,  G11C16/06

Abstract: The present invention relates to a circuit for generating a regulated voltage (RV), in particular for gate terminals of non-volatile memory cells of the floating gate type, which comprises a generator circuit (OSC,CHP) adapted to generate an unregulated voltage (VCHP) on its output, a comparator circuit coupled to the output of the generator circuit (OSC,CHP), including a reference element consisting of a non-volatile memory cell (REFC) of the floating gate type and adapted to output an electric error signal (ID) tied to the difference between the unregulated voltage (VCHP) and the threshold voltage of the cell (REFC), and a regulator circuit (CSEL,CBIAS,IVC,DRV,TR) coupled to the output of the comparator circuit and operative to regulate the unregulated voltage (VCHP) based on the value of the electric error signal (ID). Through the present circuit, the regulated voltage (RV) is made programmable and tied to the parameters of the memory cell (REFC).

公开(公告)号：DE69227020D1

公开(公告)日：1998-10-22

申请号：DE69227020

申请日：1992-03-11

Applicant: ST MICROELECTRONICS SRL

Inventor： GASTALDI ROBERTO

IPC: G11C8/08 ,  G11C16/08 ,  G11C16/06

公开(公告)号：ITTO20081018A1

公开(公告)日：2010-06-30

申请号：ITTO20081018

申请日：2008-12-30

Applicant: ST MICROELECTRONICS SRL

Inventor： BEDESCHI FERDINANDO ,  CABRINI ALESSANDRO ,  DONZE ENZO MICHELE ,  GASTALDI ROBERTO ,  RESTA CLAUDIO ,  TORELLI GUIDO

公开(公告)号：DE69627152D1

公开(公告)日：2003-05-08

申请号：DE69627152

申请日：1996-09-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  ROLANDI PAOLO ,  GASTALDI ROBERTO ,  TORELLI GUIDO

IPC: G11C11/413 ,  G11C7/06 ,  G11C11/56 ,  G11C16/06 ,  G11C7/00

公开(公告)号：DE69327164D1

公开(公告)日：2000-01-05

申请号：DE69327164

申请日：1993-09-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  GASTALDI ROBERTO ,  MALCOVATI PIERO ,  TORELLI GUIDO

IPC: G11C17/00 ,  G11C5/14 ,  G11C16/06 ,  H01L21/822 ,  H01L27/04 ,  H02M3/07 ,  H03K19/0175 ,  G11C5/00