公开(公告)号：US3184699A

公开(公告)日：1965-05-18

申请号：US27010463

申请日：1963-04-02

Applicant: PHILCO CORP

Inventor： SPERA FRANK T

IPC: H01R12/71 ,  H05K3/30 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K3/306 ,  H05K3/308 ,  H05K3/3447 ,  H05K3/4046 ,  H05K2201/09645 ,  H05K2201/10424 ,  H05K2201/10477 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10765 ,  H05K2201/10939 ,  Y10T29/53183

公开(公告)号：JP2018534746A

公开(公告)日：2018-11-22

申请号：JP2018524292

申请日：2016-11-10

Applicant: フェニックス コンタクト ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディートゲゼルシャフト ,  Phoenix Contact GmbH & Co.KG

Inventor： ラルフ ゲスケ

IPC: H01R43/16 ,  H01R12/58

CPC classification number: H01R13/052 ,  H01R12/585 ,  H01R12/71 ,  H01R43/16 ,  H05K1/184 ,  H05K2201/10863 ,  H05K2201/10878 ,  H05K2201/10901 ,  H05K2201/10939

Abstract: 本明細書では、プリント回路基板(2)のコンタクトホール(3)内へプラグインコンタクト(1)を差し込むことにより、プリント回路基板(2)に電気的に接触接続するプラグインコンタクト(1)であって、平坦で相互に比較的弾性的な2つの接触脚部(4,5)と、接続領域(6)とを有しており、前記接続領域(6)からは前記2つの接触脚部(4,5)が前記プラグインコンタクト(1)の差し込み方向(E)に延在し、前記プラグインコンタクト(1)は、金属製の平坦な材料から単一部品に打ち抜かれている、プラグインコンタクト(1)が図示され説明される。本発明によるプラグインコンタクト(1)、すなわち、2つの接触脚部(4,5)に隣接する接続領域(6)に切欠部(7)が形成されており、2つの接触脚部(4,5)は、切欠部(7)から始まって自身の自由端部(4a,5a)の方向に相互に拡大する間隔を有しており、2つの接触脚部(4,5)は相対的に相互に拡開された状態を有し、2つの接触脚部(4,5)は共に、プリント回路基板(2)の対応する前記コンタクトホール(3)の直径(D)に等しいかまたはわずかだけ小さい幅(B)を有している、プラグインコンタクトでは、小さな寸法であっても高い接触部垂直抗力が可能となり、それによりこのプラグインコンタクトは、小さな直径のコンタクトホール(3)であっても、接触対向部品との間で良好で永続的な電気的接触接続を保証する。

公开(公告)号：US08569631B2

公开(公告)日：2013-10-29

申请号：US13101908

申请日：2011-05-05

Applicant: Robert L. Doneker ,  Kent G. R. Thompson

Inventor： Robert L. Doneker ,  Kent G. R. Thompson

IPC: H05K1/03

CPC classification number: H05K1/023 ,  H05K1/0216 ,  H05K1/0366 ,  H05K3/308 ,  H05K3/4046 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/0761 ,  H05K2201/10939 ,  H05K2203/1453

Abstract: A noise dampening energy efficient circuit board includes a carbon material layer for dampening electromagnetic interference between surface mount components and trace patterns of the circuit board. One or more ground plane layers are arranged relative to the carbon material layer to cooperatively dampen and repel noise of varying frequencies. The positioning of the carbon material layer with respect to the ground plane layer enhances the ground plane operation. Glass fiber material layers and other insulating dielectric layers are disposed at particular locations within the noise dampening energy efficient circuit board. The carbon material layer and the ground plane layer dampen electromagnetic noise, thereby permitting energy saving design considerations, increasing energy efficiencies and reducing power consumption. Mounting posts of the surface mount components include insulating sleeves to selectively insulate different layers of the circuit board from surface mount components. Methods for constructing and using the circuit board are also disclosed.

Abstract translation: 噪声抑制能效电路板包括用于抑制表面安装部件和电路板的迹线图案之间的电磁干扰的碳材料层。 相对于碳材料层布置一个或多个接地层，以协同地抑制和排斥变化频率的噪声。 碳材料层相对于接地层的定位增强了接地层的操作。 玻璃纤维材料层和其它绝缘电介质层设置在噪声抑制能效电路板内的特定位置。 碳材料层和接地层可抑制电磁噪声，从而节省设计考虑因素，提高能源效率并降低功耗。 表面安装部件的安装柱包括绝缘套管，以选择性地将电路板的不同层与表面安装部件绝缘。 还公开了构造和使用电路板的方法。

公开(公告)号：US20110209909A1

公开(公告)日：2011-09-01

申请号：US13101908

申请日：2011-05-05

Applicant: Robert L. Doneker ,  Kent G. R. Thompson

Inventor： Robert L. Doneker ,  Kent G. R. Thompson

IPC: H05K1/02 ,  H05K3/36

CPC classification number: H05K1/023 ,  H05K1/0216 ,  H05K1/0366 ,  H05K3/308 ,  H05K3/4046 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/0761 ,  H05K2201/10939 ,  H05K2203/1453

Abstract: A noise dampening energy efficient circuit board includes a carbon material layer for dampening electromagnetic interference between surface mount components and trace patterns of the circuit board. One or more ground plane layers are arranged relative to the carbon material layer to cooperatively dampen and repel noise of varying frequencies. The positioning of the carbon material layer with respect to the ground plane layer enhances the ground plane operation. Glass fiber material layers and other insulating dielectric layers are disposed at particular locations within the noise dampening energy efficient circuit board. The carbon material layer and the ground plane layer dampen electromagnetic noise, thereby permitting energy saving design considerations, increasing energy efficiencies and reducing power consumption. Mounting posts of the surface mount components include insulating sleeves to selectively insulate different layers of the circuit board from surface mount components. Methods for constructing and using the circuit board are also disclosed.

Abstract translation: 噪声抑制能效电路板包括用于抑制表面安装部件和电路板的迹线图案之间的电磁干扰的碳材料层。 相对于碳材料层布置一个或多个接地层，以协同地抑制和排斥变化频率的噪声。 碳材料层相对于接地层的定位增强了接地层的操作。 玻璃纤维材料层和其它绝缘电介质层设置在噪声抑制能效电路板内的特定位置。 碳材料层和接地层可抑制电磁噪声，从而节省设计考虑因素，提高能源效率并降低功耗。 表面安装部件的安装柱包括绝缘套管，以选择性地将电路板的不同层与表面安装部件绝缘。 还公开了构造和使用电路板的方法。

公开(公告)号：US06295727B1

公开(公告)日：2001-10-02

申请号：US09227373

申请日：1999-01-08

Applicant: Yao-Kui Huang ,  Cheng-Fan Wang

Inventor： Yao-Kui Huang ,  Cheng-Fan Wang

IPC: H05K330

CPC classification number: H05K1/141 ,  H05K1/145 ,  H05K3/3405 ,  H05K3/368 ,  H05K2201/10037 ,  H05K2201/10515 ,  H05K2201/10537 ,  H05K2201/10689 ,  H05K2201/10939 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/53178

Abstract: A device and method for manufacturing an integrated real time clock integrated circuit (RTC IC) package is disclosed, in which the RTC IC and its related components are integrated into a single package. Therefore, the layout area required by the integrated RTC IC package is significantly reduced. Also, only a single manual assembling process is required. Furthermore, various examination steps are built into every process to manufacture the integrated RTC IC package to make sure the completed products are in normal condition. No extra examination and fix-up processes are required for the completed products so that manufacturing cost can be significantly reduced.

Abstract translation: 公开了用于制造集成实时时钟集成电路（RTC IC）封装的器件和方法，其中将RTC IC及其相关部件集成到单个封装中。 因此，集成RTC IC封装所需的布局面积大大减少。 此外，只需要一个手动组装过程。 此外，在制造集成的RTC IC封装的每个过程中都内置了各种检测步骤，以确保完成的产品处于正常状态。 完成的产品不需要额外的检查和修理流程，从而可以显着降低制造成本。

公开(公告)号：US5307241A

公开(公告)日：1994-04-26

申请号：US37150

申请日：1993-03-25

Applicant: Antonio Pistilli

Inventor： Antonio Pistilli

IPC: H05K1/00 ,  H05K1/14 ,  H05K3/22 ,  H05K3/34 ,  H05K1/11

CPC classification number: H05K1/147 ,  H05K1/141 ,  H05K3/225 ,  H05K1/0393 ,  H05K2201/096 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10939 ,  H05K3/3447

Abstract: A electronic circuit board arrangement includes a main circuit board on which components are mounted, with component leads passing through holes in this board. Additional components are provided on an auxiliary circuit board at least part of which is directly against the main board, either on the component side underlying components or on a soldering side of the main board. The additional components are connected to the component leads via conductive tracks on the auxiliary board. The auxiliary board can be flexible to also extend over components on the main board. The arrangement is particularly useful for adding additional components to an original circuit design.

Abstract translation: 电子电路板装置包括主电路板，组件被安装在该主电路板上，组件引线穿过该板中的孔。 附加部件设置在辅助电路板上，其辅助电路板的至少一部分直接靠在主板上，无论是在组件侧下部件上还是在主板的焊接侧。 附加组件通过辅助板上的导电轨迹连接到组件引线。 辅助板可以灵活地延伸到主板上的部件上。 该装置对于将附加组件添加到原始电路设计中特别有用。

公开(公告)号：US5184284A

公开(公告)日：1993-02-02

申请号：US754137

申请日：1991-09-03

Applicant: Brian T. Ashelin ,  Mark A. Bergquist ,  Dennis E. Noltee, Sr.

Inventor： Brian T. Ashelin ,  Mark A. Bergquist ,  Dennis E. Noltee, Sr.

IPC: H01L23/52 ,  H01L23/538 ,  H01L25/16 ,  H05K1/14 ,  H05K3/22 ,  H05K3/34 ,  H05K3/36

CPC classification number: H01L25/162 ,  H01L23/5382 ,  H05K1/141 ,  H05K3/225 ,  H01L2924/0002 ,  H05K2201/10287 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10537 ,  H05K2201/10689 ,  H05K2201/10939 ,  H05K3/3421 ,  H05K3/368

Abstract: Engineering changes (EC) for an integrated-circuit (IC) module or circuits connected to an IC module sometimes require the addition of discrete electrical components or circuit chips. Such engineering changes are implemented herein on a small printed circuit card or board that may be physically attached to the top of the IC module. The EC pads on the printed circuit EC card are juxtaposed with the IC module input/output (I/O) pins that require the engineering change. A short fly wire is then soldered between each juxtaposed EC pad and the I/O pin to make the electrical connection between the EC card and the module. In this way, no additional surface area is consumed on the printed circuit board on which the module is mounted.

Abstract translation: 集成电路（IC）模块或连接到IC模块的电路的工程变更（EC）有时需要添加分立的电气元件或电路芯片。 这样的工程变更在本文中可以在可以物理地附接到IC模块的顶部的小型印刷电路卡或板上实现。 印刷电路EC卡上的EC焊盘与需要工程更换的IC模块输入/输出（I / O）引脚并置。 然后，在每个并置的EC焊盘和I / O引脚之间焊接一根短导线，以使EC卡和模块之间的电气连接。 以这种方式，在安装模块的印刷电路板上没有消耗额外的表面积。

公开(公告)号：US4082394A

公开(公告)日：1978-04-04

申请号：US756227

申请日：1977-01-03

Applicant: Ronald Walker Gedney ,  Robert Richard Rodite

Inventor： Ronald Walker Gedney ,  Robert Richard Rodite

IPC: H01L23/32 ,  H01L23/50 ,  H01L23/52 ,  H01L23/538 ,  H05K1/00 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H05K3/36 ,  H05K1/12

CPC classification number: H01R12/58 ,  H05K1/141 ,  H01L2224/16225 ,  H05K2201/09063 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09709 ,  H05K2201/10303 ,  H05K2201/10659 ,  H05K2201/10704 ,  H05K2201/10939 ,  H05K3/3447 ,  H05K3/368

Abstract: A package assembly which combines metallized ceramic technology and printed circuit board multilayer technology. A plurality of modules on a metallized ceramic substrate have closely spaced pins, for example, on 50 mil centers or grid, are plugged into a complex high precision multilayer printed circuit carrier. The pins are staggered in height with the longer pins having a relatively wide spacing, for example, on 100 mil centers or grid. The longer pins protrude through the high precision carrier and plug into a normal relatively simple and low cost printed circuit card or planar package.

公开(公告)号：EP2471349A1

公开(公告)日：2012-07-04

申请号：EP10739888.5

申请日：2010-07-29

Applicant: OSRAM AG

Inventor： BRÜCKEL, Martin ,  HE, Haixiang ,  JIANG, Wanchun

IPC: H05K3/34 ,  H01F27/02 ,  H05K5/06 ,  H05K1/14

CPC classification number: H05K1/144 ,  H01F27/06 ,  H01F2027/065 ,  H05K3/284 ,  H05K3/3447 ,  H05K7/1418 ,  H05K2201/049 ,  H05K2201/1003 ,  H05K2201/10303 ,  H05K2201/10939 ,  Y10T29/49144

Abstract: The invention provides an electronic product having a double-PCB sandwich structure, comprising a PCB assembly and a casing having an open side, wherein a protuberance is respectively formed on the inner sides of two side walls of the casing in the longitudinal direction, the PCB assembly consists of an electronic component, a base PCB and a main PCB, the length of the base PCB and the length of the main PCB in the longitudinal direction of the casing are substantially equal to each other and slightly smaller than the length of the casing so that the PCB assembly can be installed into the casing by mating with the protuberances.

公开(公告)号：EP0364056A3

公开(公告)日：1991-04-17

申请号：EP89202587.5

申请日：1989-10-13

Applicant: Menzies, L. William, Jr. ,  Menzies, Stephen W.

Inventor： Menzies, L. William, Jr. ,  Menzies, Stephen W.

IPC: H01L23/64 ,  H01G4/40

CPC classification number: H01G2/065 ,  H01G4/35 ,  H01G4/40 ,  H01L23/642 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/141 ,  H05K3/3447 ,  H05K3/368 ,  H05K7/1092 ,  H05K2201/049 ,  H05K2201/10333 ,  H05K2201/10515 ,  H05K2201/10636 ,  H05K2201/10689 ,  H05K2201/10939 ,  Y02P70/611 ,  H01L2924/00

Abstract: A decoupling capacitor (40) is mounted on a thin auxiliary board (20) and connected by metallization traces (37, 33) on the board to a single pair of plug-in contacts (50, 51) press-fitted into a pair of apertures (36) in a pair of integral tabs (31, 32) extending from the board (30). The auxiliary board (20) and capacitor (40) height is not more than about 0.070 inches. The plug-in contacts (50, 51) are pluggable into a pair of sockets in a printed circuit board. The auxiliary insulative board (20) with its attached capacitor (40) is sandwiched between a surface of a printed circuit board (12) having a plurality of sockets, and the underside of a dual-in-line (DIP) integrated circuit package (11). At least two leads (15a, 14x) of the DIP package (11) are inserted into the pair of insertable contacts (50, 51) in the auxiliary insulative board (20) while the remainder of the DIP package leads are inserted directly into other sockets in the printed circuit board (16a, 16x, 17a, 17x). In one embodiment, other DIP leads pass through clearance holes (69, 68) in a second pair of integral tabs (63, 65). Another embodiment provides for redundant capacitors each connected to separate pairs of contacts (82, 83; 84, 85) on the auxiliary board (81) for interconnection of two ground leads and two power leads of the DIP to respective PC board sockets.