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公开(公告)号：US09744624B2
公开(公告)日：2017-08-29
申请号：US14742070
申请日：2015-06-17
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Jaen-Don Lan , Pin-Chung Lin , Chen-Rui Tseng , Cheng-En Ho , Yu-An Chen
IPC: H05K3/46 , B23K26/402 , H05K3/42 , B23K26/382 , B23K103/00
CPC classification number: B23K26/402 , B23K26/382 , B23K26/389 , B23K2101/40 , B23K2103/172 , B23K2103/30 , B23K2103/42 , B23K2103/50 , H05K3/426 , H05K3/4644 , H05K2201/0341
Abstract: Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 μm for fine line width/pitch.
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公开(公告)号：US09570227B1
公开(公告)日：2017-02-14
申请号：US14809295
申请日：2015-07-27
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yi-Nong Lin
CPC classification number: H01F27/2804
Abstract: Disclosed is a magnetic excitation coil structure including a magnetic coil sheet formed of a thin film and rolled as a cylindrical body with a hollow hole, and an insulation layer covering the outer surface of the cylindrical body formed by the magnetic coil sheet for protection. The magnetic coil sheet includes a flexible substrate, a dielectric layer attached to the flexible substrate, and a plurality of patterned circuit layers embedded in the flexible substrate and in contact with the dielectric layer. Each patterned circuit layer is separate, and the upper surfaces of the patterned circuit layers and the upper surface of the flexible substrate form a co-plane. The magnetic coil structure provides an electrical function of coil, which is enhanced by the patterned circuit layer due to its high aspect ratio of the electrical circuit, thereby greatly increasing the whole magnetic flux and electromagnetic effect.
Abstract translation: 公开了一种磁激励线圈结构，其包括由薄膜形成的作为具有中空孔的圆筒体并被卷绕的电磁线圈片，以及覆盖由用于保护的电磁线圈片形成的圆筒体的外表面的绝缘层。 磁性线圈片包括柔性衬底，附着到柔性衬底的电介质层和嵌入在柔性衬底中并与电介质层接触的多个图案化电路层。 每个图案化电路层是分离的，并且图案化电路层的上表面和柔性基板的上表面形成共面。 磁线圈结构提供线圈的电功能，由于其电路的高纵横比而由图案化电路层增强，从而大大增加了整个磁通量和电磁效应。
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公开(公告)号：US09439290B1
公开(公告)日：2016-09-06
申请号：US14817268
申请日：2015-08-04
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Chiao-Cheng Chang , Yi-Nong Lin
CPC classification number: H05K1/028 , H01F17/0013 , H05K1/118 , H05K1/165 , H05K2201/09036 , H05K2201/09063
Abstract: A carrier board structure includes at least one upper magnetic coil, at least one lower magnetic coil, a flexible board, a dielectric layer, at least one connection pad and at least one gold finger. The flexible board has a middle region having a middle hole, and two side regions thinner than the middle region. A groove used as a fold line is provided on the lower surface of each side region bordering on the middle region. The upper and lower magnetic coils are configured in the flexible board and separated by the dielectric layer. The gold fingers are provided on the two side regions and connected to the upper magnetic coils. The upper and lower magnetic coils are around the middle hole and connected by the connection pads. The fold lines help the two side regions to fold without damage to the upper and lower magnetic coils.
Abstract translation: 载体板结构包括至少一个上部磁线圈，至少一个下部磁线圈，柔性电路板，电介质层，至少一个连接焊盘和至少一个金手指。 柔性板具有中间区域，中间部分具有比中间区域薄的两个侧面区域。 用作折线的槽设置在与中间区域接壤的每个侧面的下表面上。 上下磁性线圈配置在柔性电路板中，由电介质层隔开。 金手指设置在两个侧面区域上并连接到上部磁性线圈。 上下磁性线圈围绕中间孔并通过连接垫连接。 折叠线帮助两个侧面区域折叠而不损坏上部和下部磁性线圈。
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34.发明授权公开(公告)号：US09198296B1
公开(公告)日：2015-11-24
申请号：US14590235
申请日：2015-01-06
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yu-Te Lu , Fu-Song Chen
CPC classification number: H05K1/187 , H05K1/0213 , H05K1/0298 , H05K1/115 , H05K1/183 , H05K1/185 , H05K2201/0376
Abstract: A double sided board with buried element and a method for manufacturing the same are disclosed. At least one buried element is fixed on a dielectric layer and embedded in an insulation layer. First and second electrical circuits are formed on upper and lower surfaces of the insulation layer, respectively. At least one through-hole is formed in the insulation layer and filled with a conductive layer to electrically connect the first and the second electrical circuits. The dielectric layer beneath the buried element and the insulation layer above the buried element are provided with at least one opening, respectively, which is filled with the conductive layer, thereby connecting the conductive layer and external circuits or electrical elements. Additionally, the first and second electrical circuits are covered with first and second solder masks, respectively, so as to avoid environmental effect and improve preciseness of the circuits.
Abstract translation: 公开了一种具有埋设元件的双面板及其制造方法。 至少一个埋入元件固定在电介质层上并嵌入绝缘层中。 第一和第二电路分别形成在绝缘层的上表面和下表面上。 在绝缘层中形成至少一个通孔，并填充有导电层以电连接第一和第二电路。 掩埋元件下面的绝缘层和掩埋元件上方的绝缘层分别设置有至少一个开口，其中填充有导电层，由此连接导电层和外部电路或电气元件。 此外，第一和第二电路分别被第一和第二焊接掩模覆盖，以避免环境影响并提高电路的精度。
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公开(公告)号：US20150271915A1
公开(公告)日：2015-09-24
申请号：US14223661
申请日：2014-03-24
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Jun-Chung Hsu , Bo-Yu Tseng , Yu-Hsiang Sun
CPC classification number: H05K1/0271 , H05K1/0206 , H05K1/0298 , H05K3/3436
Abstract: An enhanced chip board package structure includes a chip board and a plurality of enhanced structures, which are formed in the blind openings of the non-effective region of the chip board. Each enhanced structure has an opening. The mechanical strength is reinforced by the enhanced structures without changing the whole thickness so as to overcome the problem of warping. Meanwhile, the three-dimensional stability is thus enhanced. The opening of the enhanced structure can be selectively filled with the filler such that the mechanical strength is further reinforced and the thermally conductive effect is greatly improved.
Abstract translation: 增强的芯片板封装结构包括芯片板和多个增强结构，其形成在芯片板的非有效区域的盲孔中。 每个增强结构都有一个开口。 机械强度通过增强的结构增强，而不改变整个厚度，从而克服翘曲的问题。 同时，三维稳定性得到提高。 增强结构的开口可以选择性地填充填料，使得机械强度进一步增强，导热效果大大提高。
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Patent Agency Ranking
公开(公告)号：US09095085B2
公开(公告)日：2015-07-28
申请号：US13853325
申请日：2013-03-29
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
CPC classification number: H05K3/4647 , H05K3/4038 , H05K2203/025 , H05K2203/063 , Y10T29/49155
Abstract: Disclosed is a method of manufacturing a stacked multilayer structure, including the steps of forming a first circuit layer with bumps on a substrate, punching an aluminum plate to form recesses corresponding to the bumps, forming openings in a plastic film including a glass fiber layer corresponding to the bumps, pressing the aluminum plate, the plastic film and the substrate, removing the aluminum plate, polishing to level the resulting surface, forming a second circuit layer connected to the first circuit layer, and finally removing the substrate to form the stacked multilayer structure. Because the glass fiber layer in the plastic film is not exposed after polishing, the thickness of the dielectric layer is uniform and the reliability of the circuit layer is improved so as to increase the yield.
Abstract translation: 公开了一种制造堆叠多层结构的方法，包括以下步骤：在基板上形成具有凸块的第一电路层，冲压铝板以形成与凸块相对应的凹部，在包括玻璃纤维层的塑料膜中形成开口 对铝合金板，塑料薄膜和基板进行压制，去除铝板，进行抛光以使所得表面平坦化，形成连接到第一电路层的第二电路层，最后移除基板以形成叠层多层 结构体。 由于塑料膜中的玻璃纤维层在研磨后不露出，所以介电层的厚度均匀，电路层的可靠性得以提高，从而提高产率。
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公开(公告)号：US20150041183A1
公开(公告)日：2015-02-12
申请号：US13960082
申请日：2013-08-06
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Jun-Chung Hsu , Yu-Hui Wu , Huei-Cheng Hong
CPC classification number: H05K1/09 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/181 , H01L2924/19105 , H05K1/111 , H05K3/284 , H05K3/3436 , H05K3/368 , H05K2201/0338 , Y02P70/611 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
Abstract: A chip board package structure includes a circuit board part, a chip board part and a solder used to solder the circuit board part and the chip board part. A chip on the chip board part is connected to an electrical circuit by wiring or soldering. A surface treatment metal layer includes at least nickel, palladium and gold formed on part of the surface of the circuit layer on the chip board. A copper-tin intermetallic compound is formed on joints of the second solder and the surface treatment metal layer, and the other part of the circuit layer is directly connected to the solder to form the copper-tin intermetallic compound. In addition to the lower package cost, with the shape feature of the copper-tin intermetallic compound, it is possible to increase the contact area with the solder, thereby improving the reliability of the soldering process and the yield.
Abstract translation: 芯片组封装结构包括电路板部分，芯片板部分和用于焊接电路板部分和芯片板部分的焊料。 芯片部分的芯片通过布线或焊接连接到电路。 表面处理金属层至少包括在芯片板上的电路层表面的一部分上形成的镍，钯和金。 在第二焊料和表面处理金属层的接合部上形成铜锡金属间化合物，电路层的另一部分与焊锡直接连接，形成铜锡金属间化合物。 除了较低的封装成本之外，通过铜 - 锡金属间化合物的形状特征，可以增加与焊料的接触面积，从而提高焊接工艺的可靠性和产率。
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公开(公告)号：US08875390B2
公开(公告)日：2014-11-04
申请号：US13663274
申请日：2012-10-29
Applicant: Kinsus Interconnect Technology Corp.
Inventor： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
IPC: H01K3/00
CPC classification number: H05K3/4682 , H05K1/0271 , H05K2201/09136 , H05K2201/2018 , H05K2203/0152 , H05K2203/0376 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/4916
Abstract: A method of manufacturing a laminate circuit board which includes the sequential steps of metalizing the substrate to form the base layer, forming the first circuit metal layer, forming at least one insulation layer and at least one second circuit metal layer interleaved, removing the substrate, forming the support frame and forming the solder resist is disclosed. The laminate circuit board has a thickness less than 150 μm. The support frame which does not overlap the first circuit metal layer is formed on the edge of the base layer by the pattern transfer process after the substrate is removed. The base layer formed of at least one metal layer is not completely removed. The support frame provides enhanced physical support for the entire laminate circuit board without influence on the electrical connection of the circuit in the second circuit metal layer, thereby solving the warping problem.
Abstract translation: 一种叠层电路板的制造方法，其特征在于，包括使所述基板金属化以形成所述基底层的顺序步骤，形成所述第一电路金属层，形成至少一个绝缘层和交替插入的至少一个第二电路金属层，去除所述基板， 公开了形成支撑框架并形成阻焊剂的方法。 层叠电路板的厚度小于150μm。 在去除衬底之后，通过图案转印工艺在基层的边缘上形成不与第一电路金属层重叠的支撑框架。 由至少一个金属层形成的基底层没有被完全去除。 支撑框架对整个层叠电路板提供增强的物理支撑，而不影响第二电路金属层中的电路的电连接，从而解决翘曲问题。
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公开(公告)号：US20140290057A1
公开(公告)日：2014-10-02
申请号：US13853325
申请日：2013-03-29
Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
Inventor： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
IPC: H05K3/46
CPC classification number: H05K3/4647 , H05K3/4038 , H05K2203/025 , H05K2203/063 , Y10T29/49155
Abstract: Disclosed is a method of manufacturing a stacked multilayer structure, including the steps of forming a first circuit layer with bumps on a substrate, punching an aluminum plate to form recesses corresponding to the bumps, forming openings in a plastic film including a glass fiber layer corresponding to the bumps, pressing the aluminum plate, the plastic film and the substrate, removing the aluminum plate, polishing to level the resulting surface, forming a second circuit layer connected to the first circuit layer, and finally removing the substrate to form the stacked multilayer structure. Because the glass fiber layer in the plastic film is not exposed after polishing, the thickness of the dielectric layer is uniform and the reliability of the circuit layer is improved so as to increase the yield.
Abstract translation: 公开了一种制造堆叠多层结构的方法，包括以下步骤：在基板上形成具有凸块的第一电路层，冲压铝板以形成与凸块相对应的凹部，在包括玻璃纤维层的塑料膜中形成开口 对铝合金板，塑料薄膜和基板进行压制，去除铝板，进行抛光以使所得表面平坦化，形成连接到第一电路层的第二电路层，最后移除基板以形成叠层多层 结构体。 由于塑料膜中的玻璃纤维层在研磨后不露出，所以介电层的厚度均匀，电路层的可靠性得以提高，从而提高产率。
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公开(公告)号：US08766102B2
公开(公告)日：2014-07-01
申请号：US13663303
申请日：2012-10-29
Applicant: Kinsus Interconnect Technology Corp.
Inventor： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
CPC classification number: H05K1/056 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L2924/0002 , H05K1/0204 , H05K2201/029 , H05K2201/0323 , H05K2201/09054 , H05K2203/0323 , H05K2203/0384 , H05K2203/063 , H01L2924/00
Abstract: A chip support board structure which includes at least a metal substrate, a block layer, a paddle, an insulation layer, a circuit layer and a solder resist is disclosed. The circuit layer connects with the paddle. The material of the block layer is different from that of the metal substrate and the block layer is provided between the metal substrate and the paddle such that the shape and the depth of the paddle is maintained constant and the problem of different depth and easily peeling off is avoided, thereby improving the yield rate of the chip support board.
Abstract translation: 公开了至少包括金属基板，阻挡层，桨，绝缘层，电路层和阻焊剂的芯片支撑板结构。 电路层与桨连接。 阻挡层的材料与金属基板的材料不同，并且在金属基板和板之间设置阻挡层，使得桨的形状和深度保持恒定，并且具有不同深度并容易剥离的问题 从而提高了芯片支撑板的成品率。
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