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公开(公告)号:JPH09244960A
公开(公告)日:1997-09-19
申请号:JP14605796
申请日:1996-06-07
Applicant: TANDEM COMPUTERS INC
Inventor: ROBAATO DABURIYUU HOOSUTO , UIRIAMU EDOWAADO BEIKAA , UIRIAMU PATAASON BANTON , GEARII EFU KIYANBERU , RICHIYAADO DABURIYUU KATSUTSU , DANIERU ERU FUAURAA , DEIBUITSUDO JIEI GAASHIA , POORU ENU HINTEITSUKA , JIEFURII AI ISUWANDEII , DEIBUITSUDO POORU SOONIA , UIRIAMU JIYOERU WATOSON , FURANKU EI UIRIAMUSU
IPC: G06F12/14 , G06F11/18 , G06F15/16 , G06F15/163 , G06F15/167
Abstract: PROBLEM TO BE SOLVED: To check the error of a processor at an interface spot without affecting the processor performance by providing a specific table means and also a means which receives a message from a peripheral device and decides whether the access should be permitted to a memory means based on the received message. SOLUTION: The routers 14A and 14B are connected to the subprocessor systems 10A and 10B, and the I/O packets 16A and 16B are connected to the routers 14A and 14B respectively. This device of such a constitution has a table means which includes plural entries to discriminate permission of the access to a part of a memory means against one of its peripheral devices. Therefore, the message packet sent via an I/O has the information on the originator and the destination. Then a receiving CPU refers to the external source that is permitted to access its memory via an access propriety check and a conversion (AVT) table and checks whether the access is permitted or not.
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公开(公告)号:JPH09171478A
公开(公告)日:1997-06-30
申请号:JP18265696
申请日:1996-06-07
Applicant: TANDEM COMPUTERS INC
Inventor: HARII EI RESURII , DEBITSUDO DABURIYU BAAZUOORU , ROHITO ENU JIEIN , HEDEII YAGUMAI
Abstract: PROBLEM TO BE SOLVED: To easily and efficiently search a data base. SOLUTION: Each search key is constructed with a general expression sentence generated by the compiler 128 of the data base management system on the basis of a search question. Each key column indicates another dimension and a range and an IN list are specified with a search question and usable as a multicolum predicate value. A predicate which is not specified with the question is interpreted to specify the maximum value and minimum value of the relative column key. The compiler 128 generates a general expression used by the executor 124 of the system so as to generate a search key. The compiler 128 evaluates the search question by relating the predicate with a cluster and an OR item number assigned to each OR item of the question expression. The executor 124 uses the general expression from the compiler 128, and removes the contradiction between identical column predicates and the redundancy of the predicate value and OR item to decrease and minimize the number of records to be accessed. The search keys are generated in the same order with the indexes that the searches belong to.
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公开(公告)号:JPH09134336A
公开(公告)日:1997-05-20
申请号:JP14527096
申请日:1996-06-07
Applicant: TANDEM COMPUTERS INC
Inventor: ROBAATO DABURIYUU HOOSUTO , UIRIAMU EDOWAADO BEIKAA , RINDA ERIN ZARUZAARA , UIRIAMU PATAASON BANTON , RICHIYAADO DABURIYUU KATSUTSU , DEIBUITSUDO JIEI GAASHIA , JIYON SHII KURAUSU , SUTEIIBUN JII ROU , DEIBUITSUDO POORU SOONIA , UIRIAMU JIYOERU WATOSON , PATORISHIA ERU HOWAITOSAIDO
Abstract: PROBLEM TO BE SOLVED: To provide a multiprocessor system via a single system by attaining a fault tolerant action through the fail-first and fail-functional actions. SOLUTION: The transmitting clock signals existing on a two-way link are supplied to a pair of transmitting and receiving elements in order to demarcate the clock cycles and also to receive the multi-bit words in a processing system which includes the paired transmitting and receiving elements connected to each other for communication of the multi-bit words including the multi-bit data words and multi-bit command words. Then one of paired transmitting and receiving elements transmits the data to the other element in form of a series of multi-bit data words, transmits the multi-bit data words in every clock cycle and transmits the multi-bit command words in every clock cycle and with no sequence.
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公开(公告)号:JPH0954754A
公开(公告)日:1997-02-25
申请号:JP14573396
申请日:1996-06-07
Applicant: TANDEM COMPUTERS INC
Inventor: MAAKU FUIRITSUPUSU , JIYON ESU DEI ROO , ANDORIASU II HOOTEI , ROBAATO DABURIYUU RETSUDO , DEIBUITSUDO BUERASUKO
IPC: G06F15/16 , G06F12/00 , G06F15/00 , G06F15/177 , H04L29/06
Abstract: PROBLEM TO BE SOLVED: To secure the loose coupling among many processors included in a system and to evade the common use of the resources by starting the execution of a transaction in one of user application processes based on the data received from the end user terminals. SOLUTION: Many user application processes 116-2 to 116-N are distributed among the server computers. In a communication management process 112, the data are transferred between the end user terminals 102-1 to 102-J and a transaction router process 114 that is carried out by one of server computers. In the process 114, one of transactions kept in the standby states is carried out in one of processes 116-2 to 116-N based on the data received from the terminals 102-1 to 102-J.
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公开(公告)号:JPH08339319A
公开(公告)日:1996-12-24
申请号:JP934896
申请日:1996-01-23
Applicant: TANDEM COMPUTERS INC
Inventor: RUISU EMU MADORITSUDO , RICHIYAADO EI MAIAA , FURANKO PUTSUTSUORU , SUNIRU SHIYAAMA , TOOMASU JIEI OOSHIEI , JIEEMUZU EICHI TOROISHI , HANSUYORUGU TSUERAA , GEARII EMU GIRUBAATO
Abstract: PROBLEM TO BE SOLVED: To distinguish two data base schema changes which necessitates/ unnecessitates the recompile of an inquiring statement accessing a changed data base table. SOLUTION: In a computer system 100 storing and supplying a user access to data of a stored object, a memory exists for storing the object and each object is a first execution plan corresponding to a memory with a related schema expressing information on the internal structure of the object, a first source code statement and a source code statement for accessing data designated by the stored object. Then, the first execution plan including schema information expressing the subset of the schema with respect to an object designated when the first source code statement is finally compiled and an object managing system for executing a user's command are provided.
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公开(公告)号:JPH0887338A
公开(公告)日:1996-04-02
申请号:JP16185895
申请日:1995-06-28
Applicant: TANDEM COMPUTERS INC
Inventor: DEIBUITSUDO ERU OORUDORITSUJI , UIRIAMU PII BANTON , SUTEIIBUN AARU BIISERU , DEIBUITSUDO BURAUN , DANIERU DEII GAN , KAARU KAAGII , DEIBUITSUDO PII SOONIA
Abstract: PURPOSE: To test a potential fault in a power mixing device by providing first and second power rail and the power mixing device in a circuit module. CONSTITUTION: The first power rail 30 of a circuit 10 is connected to the input of a DC controller(DCC) 32 through a first fuse 34, a first power path transistor 36 and a first isolation diode 38 which are mutually serially connected. Similarly a second power rail 40 is connected to the input of DCC 32 through a second fuse 44, a second power path transistor 46 and a second isolation diode 48 which are mutually serially connected. In addition a first test circuit 80 is provided with a first test opto-isolator 82 and its control input is connected to a first test node 84 arranged between the drain of a first power path N-channel MOS transistor 36 and the cathode of the first isolation diode 38. Consequently, a potential fault test is made possible at the power mixing device.
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公开(公告)号:JPH0833874B2
公开(公告)日:1996-03-29
申请号:JP28230688
申请日:1988-11-08
Applicant: TANDEM COMPUTERS INC
Inventor: ROBAATO DABURYUU HOOSUTO
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公开(公告)号:JPH0883197A
公开(公告)日:1996-03-26
申请号:JP18780495
申请日:1995-06-30
Applicant: TANDEM COMPUTERS INC
Inventor: TOOMASU DEII KIMU , SESU JII HOOSON , JIYOSEFU ESU KOSHINSUKI
Abstract: PURPOSE: To simply and efficiently debugging a software program. CONSTITUTION: In a computer system, information for important debug is read out from a computer memory and/or a remote storing memory. Through the use of this information for debugging, the tree of calling between various functions constituting a program to debug is diagrammatically displayed. A debug command is accepted through a diagrammatic user interface by user's direct operation to the diagrammatic display of the function of the program. The performance of accepting the user command through the diagrammatic user interface and the performance of displaying information for important debug by using this interface facilitate the debug of the program very much.
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公开(公告)号:JPH0844537A
公开(公告)日:1996-02-16
申请号:JP13291695
申请日:1995-05-02
Applicant: TANDEM COMPUTERS INC
Inventor: JIEIMUZU EICHI TOROISHI
IPC: G06F7/24
Abstract: PURPOSE: To minimize inefficiency and to minimize the necessary number of times of a sort operation by dynamically reconstituting a sort tree in an optimized effective size. CONSTITUTION: A sort tree is prepared in a segment assigned to a volatile memory. The sort tree is provided with hierarchically arranged outside node 70, inside node 80 and route node 85. Then, when the sort tree is prepared, one position in the memory is assigned to each node. Within the range of the segment assigned to the volatile memory, the sort tree in any size can be selected. Preferably, the maximum sort tree size is selected so that as large a part of a valid space in an RAM memory as possible is occupied. Then, the sort tree is started by filling this tree with an initial value in a specific sequence.
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公开(公告)号:JPH07235933A
公开(公告)日:1995-09-05
申请号:JP25063794
申请日:1994-10-17
Applicant: TANDEM COMPUTERS INC
Inventor: KEBUIN JIEI ROOUETSUTO
Abstract: PURPOSE: To provide the fault tolerant connection of a network by turning one of controllers to a communication path to the network and specifying the other as a backup by a server connected to a pair of network controllers. CONSTITUTION: A LAN 10 is provided with a CPU 12 functioning as a network server and the network uses an 'Ethernet(R)' protocol. The CPU 12 is provided with processor units 14a and 14b, they are connected to one another and inter- processor communication is performed by buses 16a and 16b. The CPU 14 is provided with I/O buses 20a and 20b. Also, the LAN controllers 26 and 28 of dual ports are connected to the I/O buses 20a and 20b and the controllers 26 and 28 are respectively connected through LAN hubs 32 and 34 to the LAN hubs 32 and 34. The controller 26 functions as a primary, the controller 28 functions as the backup and all the communication is performed through the controllers 26 and 28.
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