公开(公告)号：JPH09244960A

公开(公告)日：1997-09-19

申请号：JP14605796

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ROBAATO DABURIYUU HOOSUTO ,  UIRIAMU EDOWAADO BEIKAA ,  UIRIAMU PATAASON BANTON ,  GEARII EFU KIYANBERU ,  RICHIYAADO DABURIYUU KATSUTSU ,  DANIERU ERU FUAURAA ,  DEIBUITSUDO JIEI GAASHIA ,  POORU ENU HINTEITSUKA ,  JIEFURII AI ISUWANDEII ,  DEIBUITSUDO POORU SOONIA ,  UIRIAMU JIYOERU WATOSON ,  FURANKU EI UIRIAMUSU

IPC: G06F12/14 ,  G06F11/18 ,  G06F15/16 ,  G06F15/163 ,  G06F15/167

Abstract: PROBLEM TO BE SOLVED: To check the error of a processor at an interface spot without affecting the processor performance by providing a specific table means and also a means which receives a message from a peripheral device and decides whether the access should be permitted to a memory means based on the received message. SOLUTION: The routers 14A and 14B are connected to the subprocessor systems 10A and 10B, and the I/O packets 16A and 16B are connected to the routers 14A and 14B respectively. This device of such a constitution has a table means which includes plural entries to discriminate permission of the access to a part of a memory means against one of its peripheral devices. Therefore, the message packet sent via an I/O has the information on the originator and the destination. Then a receiving CPU refers to the external source that is permitted to access its memory via an access propriety check and a conversion (AVT) table and checks whether the access is permitted or not.

公开(公告)号：JPH09128347A

公开(公告)日：1997-05-16

申请号：JP14555196

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ROBAATO DABURIYUU HOOSUTO ,  UIRIAMU EDOWAADO BEIKAA ,  RANDARU JII BANTON ,  JIYON MAIKERU BURAUN ,  UIRIAMU EFU BURUTSUKAATO ,  UIRIAMU PATAASON BANTON ,  GEARII EFU KIYANBERU ,  JIYON DEIIN KOODEINTON ,  RICHIYAADO DABURIYUU KATSUTSU ,  BARII RII DOREKUSURAA ,  HARII FURANKU ERUROTSUDO ,  DANIERU ERU FUAURAA ,  DEIBUITSUDO JIEI GAASHIA ,  POORU ENU HINTEITSUKA ,  JIEFURII AI ISUWANDEII ,  DAGURASU YUUJIIN JIYUUITSUTO ,  KAATEISU UIIRAADO JIYOONZU JIY ,  JIEEMUZU SUTEIIBUNSU KURETSUKA ,  JIYON SHII KURAUSU ,  SUTEIIBUN JII ROU ,  SUUZAN SUTOON MERADEISU ,  SUTEIIBUN SHII MEIAAZU ,  DEIBUITSUDO POORU SOONIA ,  UIRIAMU JIYOERU WATOSON ,  PATORISHIA ERU HOWAITOSAIDO ,  FURANKU EI UIRIAMUSU ,  RINDA ERIN ZARUZAARA

IPC: G06F11/18 ,  G06F11/16 ,  G06F15/16 ,  G06F15/17

Abstract: PROBLEM TO BE SOLVED: To facilitate fault-tolerant operation by including a routing element coupled with the central processor and peripheral device of a subprocessing system so as to transmit data between the central processor and peripheral device of the subprocessing system. SOLUTION: Subprocessor systems 10A and 10B include central processors CPUs 12, routers 14, and plural input/output I/O packet interfaces 16 connected to many I/O devices 17 by characteristic input/output NIO buses. The MPs 18 of the subprocessor system 10A and 10B connect IEEE1149. one-test buses 17 and registers used by the MPs 18 to transmit states and control information between elements and MPs 18 to elements of the subprocessor systems through on-line access port OLAP interfaces included in the elements.