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    Preloading software onto a computer system
    31.
    发明专利
    Preloading software onto a computer system 未知

    公开(公告)号：GB2309104B

    公开(公告)日：2000-06-07

    申请号：GB9600534

    申请日：1996-01-11

    Applicant: IBM

    Inventor： SIMPSON PHILIP MCARTHUR ,  SEEN AYLWIN YIM ,  DAY MICHAEL NORMAN ,  FRYE JESSE CHARLES

    IPC: G06F9/445

    Abstract: A method is described for preloading operating system software onto a computer system. A manufacturing compact disk is provided which stores the complete range of software which may be stored on the computer system. Associated with the computer system is a manufacturing diskette which includes installation files which define which software on the CD is to be transferred to the system. This manufacturing diskette also includes diagnostic and/or other code which is employed at other stages of the system assembly process. In operation, the CD and diskette are inserted into the system and the software defined by the diskette installation files is transferred from the CD to the system hardfile.

    33.
    发明专利
    未知

    公开(公告)号：DE3778558D1

    公开(公告)日：1992-06-04

    申请号：DE3778558

    申请日：1987-01-08

    Applicant: IBM

    Inventor： DAY MICHAEL NORMAN

    IPC: G06F1/04 ,  G06F1/32 ,  G06F15/02 ,  G06F1/00

    Abstract: An apparatus and method are provided for disabling the clocking of a processor in a battery operated computer during non-processing times. The clocking is disabled at the conclusion of a processing operation. The clocking can then be re-enabled using interrupts from any one of a plurality of sources, such as an I/O device or a direct memory access. Application programs and operating system programs running on the system can specify the stopping of the system clock and the central processor until a specified event which had been requested occurs, or until an optional time-out period has expired. In this situation, the event is defined as one that results in either a system interrupt from an I/O device or from a direct memory access operation. The stopping of the system clock is a two part operation wherein in the first part the stopping mechanism is first armed. If an interrupt is received subsequent to arming, then it will be processed and the arming mechanism will be reset. However, if an interrupt does not occur after arming within a specified time period, then the system clock will be stopped.

    34.
    发明专利
    未知

    公开(公告)号：DE60320026T2

    公开(公告)日：2009-05-14

    申请号：DE60320026

    申请日：2003-11-21

    Applicant: IBM

    Inventor： DAY MICHAEL NORMAN ,  HOFSTEE HARM PETER ,  JOHNS CHARLES RAY ,  KAHLE JAMES ALLAN ,  TRUONG THUONG QUANG ,  SHIPPY DAVID

    IPC: G06F12/10 ,  G06F12/12

    Abstract: Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.

    35.
    发明专利
    未知

    公开(公告)号：DE60320026D1

    公开(公告)日：2008-05-08

    申请号：DE60320026

    申请日：2003-11-21

    Applicant: IBM

    Inventor： DAY MICHAEL NORMAN ,  HOFSTEE HARM PETER ,  JOHNS CHARLES RAY ,  KAHLE JAMES ALLAN ,  TRUONG THUONG QUANG ,  SHIPPY DAVID

    IPC: G06F12/10 ,  G06F12/12

    Abstract: Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.

    SISTEMA Y METODO PARA LA VIRTUALIZACION DE RECURSOS DE PROCESADOR.
    36.
    发明专利
    SISTEMA Y METODO PARA LA VIRTUALIZACION DE RECURSOS DE PROCESADOR. 未知

    公开(公告)号：MX2007003679A

    公开(公告)日：2007-04-19

    申请号：MX2007003679

    申请日：2005-08-24

    Applicant: IBM

    Inventor： DAY MICHAEL NORMAN ,  NUTTER MARK RICHARD ,  XENIDIS JAMES ,  AGUILAR MAXIMINO JR

    IPC: G06F12/00

    Abstract: Se presentan un sistema y un metodo para la virtualizacion de recursos de procesador. Se crea una linea sobre un procesador y la memoria local del procesador se trazo en un espacio de direccion efectivo. Al hacer esto asi. La memoria local del procesador es accesible por otros procesadores, sin importar si el procesador esta funcionando. Las lineas adicionales crean trazos de mapas de memorias locales adicionales en el espacio de direccion efectiva. Los espacios de direccion efectiva corresponden a una memoria local fisica o un area de copia "flexible". Cuando el procesador este funcionando, un procesador diferente puede tener acceso a los datos que se localizan en la memoria local del primer procesador desde el area de almacenamiento local de procesador. Cuando el procesador no esta funcionando, se almacena una copia flexible de la memoria local del procesador en lugar de la memoria (es decir, antememoria bloqueada, memoria fija del sistema, memoria virtual, etc.) para que otros procesadores continuen teniendo acceso.

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