公开(公告)号：JP2004335646A

公开(公告)日：2004-11-25

申请号：JP2003128061

申请日：2003-05-06

Applicant: Sony Corp ,  Sumitomo Electric Ind Ltd ,  ソニー株式会社 ,  住友電気工業株式会社

Inventor： NAKAYAMA MASAHIRO ,  MATSUMOTO NAOKI ,  TAMAMURA KOJI ,  IKEDA MASAO

IPC: C30B29/38 ,  H01L21/20 ,  H01L21/205 ,  H01L29/04 ,  H01L29/20

Abstract: PROBLEM TO BE SOLVED: To provide a GaN single crystal substrate in which surface level difference is suppressed such that the epitaxial layer level difference becomes 0.5 μm or less.
SOLUTION: Polishing is performed using abrasive grains having a constant ejection. Abrasive grains having a constant ejection do not enter a defect collective region H strongly to recess a stripe core H. Since the defect collective region H is weak to strong alkali, solution of weak alkali (e.g. NH
4 OH) is employed. Height of the recess in the stripe core is controlled to 0.5 μm or less, 0.2 μm or less, or 0.03 μm or less by two ideas. When the upper limit of the allowable level difference of an epitaxial layer is 0.5 μm and the width of the stripe core is D (μm), level difference Q (μm) of the substrate is set Q≤10/D. Consequently, (1) the stripe H has chemical and physical properties different from those of the surrounding Ga surface, (2) when polishing is performed under same conditions, the stripe core H becomes a recess and the GaN crystal has a low part of the stripe core H and other high part, and (3) a problem that a level difference appears in the epitaxial layer being grown on such a substrate is solved.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供其中抑制表面电平差使得外延层电平差变为0.5μm或更小的GaN单晶衬底。

解决方案：使用具有恒定喷射的磨料颗粒进行抛光。 具有恒定喷射的磨粒不会强烈地进入缺陷集合区域H以使条纹芯H凹陷。由于缺陷集合区域H弱至强碱，弱碱溶液（例如NH 4 SBO 4 ）。 通过两个想法将条纹芯中的凹部的高度控制为0.5μm以下，0.2μm以下或0.03μm以下。 当外延层的允许电平差的上限为0.5μm，条纹芯的宽度为D（μm）时，将基板的电平差Q（μm）设定为Q≤10/ D。 因此，（1）条纹H具有与周围Ga表面不同的化学和物理性质，（2）当在相同条件下进行研磨时，条纹芯H成为凹部，并且GaN晶体具有低部分 条纹芯H等高部分，（3）解决了在这种基板上生长的外延层中出现电平差的问题。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004281432A

公开(公告)日：2004-10-07

申请号：JP2003066597

申请日：2003-03-12

Applicant: Nichia Chem Ind Ltd ,  Sony Corp ,  ソニー株式会社 ,  日亜化学工業株式会社

Inventor： SUGIMOTO YASUNOBU ,  YONEDA AKINORI ,  TAKEYA MOTONOBU ,  UCHIDA SHIRO ,  IKEDA MASAO

IPC: H01L21/28 ,  H01L33/32 ,  H01L33/40 ,  H01S5/042 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a nitride semiconductor element in which the contact resistance between the electrode and semiconductor layer is small even when the element is driven by feeding a large current and, in addition, which is extremely excellent in adhesion and mechanical strength, and to provide a method of manufacturing the element. SOLUTION: The nitride semiconductor element has a multilayered constitution provided with a first metal layer M1 and at least a second metal layer M2 composed of a material which is different from that of the first metal layer M1 on a laminated semiconductor layer Q. The first metal layer M1 is composed of a metal material which is brought into ohmic contact with the semiconductor layer Q. The second metal layer M2 is the uppermost layer of the electrode and composed of a metal material having a capping action. In addition, the first and second metallic layers M1 and M2 are composed of elements of the platinum group. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种氮化物半导体元件，其中即使通过馈送大电流驱动元件，电极和半导体层之间的接触电阻也很小，此外，其粘合性极好， 机械强度，并提供制造元件的方法。 解决方案：氮化物半导体元件具有设置有第一金属层M1和至少第二金属层M2的多层结构，第二金属层M2由层叠半导体层Q上与第一金属层M1的材料不同的材料构成。 第一金属层M1由与半导体层Q形成欧姆接触的金属材料构成。第二金属层M2是电极的最上层，由具有封盖作用的金属材料构成。 此外，第一和第二金属层M1和M2由铂族的元素组成。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2002335053A

公开(公告)日：2002-11-22

申请号：JP2001191614

申请日：2001-06-25

Applicant: SONY CORP

Inventor： HINO TOMOKIMI ,  TOJO TAKESHI ,  IKEDA MASAO ,  OFUJI YOSHIO ,  UCHIDA SHIRO ,  TOMITANI SHIGETAKA ,  MORITA ETSUO

IPC: H01L21/302 ,  H01L21/3065 ,  H01S5/028 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To readily manufacture a semiconductor laser using a nitride III-V compound semiconductor whose operation current increases extremely little during energization, life is long and deterioration is extremely little over aging. SOLUTION: After an edge faced of a resonator of a semiconductor laser is formed wherein a nitride III-V compound semiconductor is used, a process for exposing a resonator edge to a plasma atmosphere of inert gas or heating it at a temperature of 30 deg.C or higher and 700 deg.C or lower in vacuum or inert gas atmosphere, and a process for exposing a resonator edge to a plasma atmosphere of inert gas, are carried out, or a resonator edge face is exposed to plasma atmosphere of inert gas at a temperature of 30 deg.C or higher and 700 deg.C or lower. After these treatments, edge face coating is performed for a resonator edge. Alternately, edge coating is performed for a resonator edge via an adhesion layer.

公开(公告)号：JP2001352133A

公开(公告)日：2001-12-21

申请号：JP2000168312

申请日：2000-06-05

Applicant: SONY CORP

Inventor： TAKEYA MOTONOBU ,  YANASHIMA KATSUNORI ,  ASANO TAKEHARU ,  GOTO OSAMU ,  IKEDA MASAAKI ,  SHIBUYA KATSUYOSHI ,  HINO TOMOKIMI ,  KIJIMA SATORU ,  IKEDA MASAO

IPC: H01L21/205 ,  H01L33/32 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor laser for obtaining a crystal growth layer with less fluctuation in a crystal axis and for improving the characteristics of a device, a semiconductor device and a nitride-family III-V group compound substrate, and their manufacturing method. SOLUTION: A plurality of seed crystal layers 12 provided separately on one surface side of a substrate 11 for growth, and an n-side contact layer 13 that is grown based on the plurality of seed crystal layers and has a growth region in a crosswise direction, are provided. In the seed crystal layer 12, the product of width w1 (unit: μm) of a boundary surface 12a with the n-side contact layer 13 in its arranged direction A and thickness t1 (unit: μm) in a direction where the n-side contact layer 13 is laminated is set to 15 or less, thus reducing the fluctuation of the crystal axis on the n-side contact layer 13, and hence improving the crystallinity of a semiconductor layer from an n-type clad layer 14 to a p-side contact layer 19 being laminated on the n-side contact layer 13.

公开(公告)号：JP2000058462A

公开(公告)日：2000-02-25

申请号：JP22910198

申请日：1998-08-13

Applicant: SONY CORP

Inventor： HASHIMOTO SHIGEKI ,  YANASHIMA KATSUNORI ,  ASAZUMA YASUNORI ,  IKEDA MASAO

IPC: C30B25/02 ,  H01L21/205 ,  H01L33/32 ,  H01S5/00 ,  H01S5/323 ,  H01L33/00 ,  H01S5/30

Abstract: PROBLEM TO BE SOLVED: To manufacture nitride based III-V compound semiconductor in which non-luminescence center is few and crystallinity is superior. SOLUTION: In this method, a nitride based III-V compound semiconductor is manufactured by vapor deposition using material of a group III element, ammonia as material of group V element and hydrogen. Vapor phase mol. ratio (H2/(H2+NH3) of hydrogen to the total amount of hydrogen and ammonia is specified as 0.3

公开(公告)号：JPH09321388A

公开(公告)日：1997-12-12

申请号：JP15765896

申请日：1996-05-29

Applicant: SONY CORP

Inventor： OZAWA MASABUMI ,  TOJO TAKESHI ,  IKEDA MASAO

IPC: H01L33/14 ,  H01L33/28 ,  H01L33/30 ,  H01L33/40 ,  H01S5/00 ,  H01S3/18 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a structural substrate manufacturing method capable of forming impurity regions selectively without worsening the surface morphology, and capable of making device characteristics better. SOLUTION: After an n-type first AlGaAs layer (Alx Ga1-x As(0

公开(公告)号：JPH09121073A

公开(公告)日：1997-05-06

申请号：JP29891495

申请日：1995-10-24

Applicant: SONY CORP

Inventor： TOMITANI SHIGETAKA ,  OZAWA MASABUMI ,  ITO SATORU ,  IKEDA MASAO

IPC: H01L33/06 ,  H01L33/12 ,  H01L33/14 ,  H01L33/28 ,  H01L33/30 ,  H01S5/00 ,  H01S3/18 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element having a low operating voltage and a long service life using a highly reliable II-VI compound semiconductor. SOLUTION: A p-type Alx Ga1-x As buffer layer 2 and a p-type (Alx Ga1-x )y In1-y buffer layer 3 are formed sequentially on a p-type GaAs substrate 1 and then II-VI compound semiconductor layers, i.e., a p-type ZnSe buffer layer 5, a p-type ZnMeSSe clad layer 7, a p-type ZnSSe optical waveguide layer 8, a ZnCdSe active layer 9, an n-type ZnSSe optical waveguide layer 10, an n-type ZnMgSSe clad layer 11, etc., are formed thereon to constitute a semiconductor light emitting element. In this regard, a p-type GaAs crystal defect suppression layer 4 is provided between the p-type (Alx Ga1-x )y In1-y buffer layer 3 and p-type ZnSe buffer layer 5.

公开(公告)号：JPH0888175A

公开(公告)日：1996-04-02

申请号：JP24693594

申请日：1994-09-14

Applicant: SONY CORP

Inventor： TAMAMURA KOJI ,  TSUKAMOTO HIRONORI ,  IKEDA MASAO

IPC: C30B23/02 ,  H01L21/203 ,  H01L21/363 ,  H01L33/28 ,  H01S5/00 ,  H01L33/00 ,  H01S3/18

Abstract: PURPOSE: To provide a molecular beam epitaxial growth equipment which can form a II-VI compound semiconductor layer having a P-type ohmic layer without mixing Te in other layers, and a manufacturing method of an optical semiconductor device. CONSTITUTION: A molecular beam epitaxial growth (MBE) equipment 1 (MBE) is provided with at least a plurality of chambers constituted of a first chamber 12 and a second chamber 13. The first chamber 12 is used for forming a II-VI compound semiconductor layer which does not contain Te, and the second chamber 13 is used for forming a II-VI compound semiconductor layer which contains at least Te. The manufacturing method of an optical semiconductor device is a method for manufacturing an optical semiconductor device wherein II-VI compound semiconductor layers are laminated, and a II-VI compound semiconductor layer which contains at least Te is formed by using the MBE equipment 1.

公开(公告)号：JPH07326825A

公开(公告)日：1995-12-12

申请号：JP14264094

申请日：1994-05-31

Applicant: SONY CORP

Inventor： MATSUMOTO OSAMU ,  ITO SATORU ,  IKEDA MASAO

IPC: H01L33/06 ,  H01L33/12 ,  H01L33/28 ,  H01L33/30 ,  H01L33/40 ,  H01S5/00 ,  H01S3/18 ,  H01L33/00

Abstract: PURPOSE:To improve electric and optical characteristics of a semiconductor device, by preventing the deterioration of crystallinity of II-VI compound semiconductor layer which is to be caused by defect due to lattice unconformity between the substratum of III-V compound semiconductor and the growth layer of II-VI compound semiconductor. CONSTITUTION:One or more sets of super lattice 13 composed of a zinc cadmium selenium thin film 31 and a zinc sulfur selenium thin film 32 are formed between a semiconductor substratum 11 composed of III-V compound semiconductor and a II-VI compound semiconductor layer 14. A buffer layer 12 wherein the same kind of crystal as the semiconductor substratum 11 is grown is formed between the semiconductor substratum 11 and the super lattice 13. The similar super lattice (which is not shown in figure) is formed in the II-VI compound semiconductor layer 14.

公开(公告)号：JPH07170026A

公开(公告)日：1995-07-04

申请号：JP3152894

申请日：1994-03-01

Applicant: SONY CORP

Inventor： HINO TOMOKIMI ,  ITO SATORU ,  IKEDA MASAO ,  ISHIBASHI AKIRA ,  UKITA SHOICHI ,  HIEI FUTOSHI

IPC: H01L33/06 ,  H01L33/28 ,  H01L33/30 ,  H01L33/40 ,  H01S5/00 ,  H01S3/18 ,  H01L33/00

Abstract: PURPOSE:To improve contact resistance of a P side electrode part, lattice matching and operating voltage in a II-VI compound semiconductor device. CONSTITUTION:A P side electrode part consists of the following; a first P-type semiconductor layer 11 which hardly comes into ohmic contact with a metal electrode, a second P-type semiconductor layer 12 which is formed on the semiconductor layer 11 and can come into ohmic contact with the metal electrode, and a superlattice structure part 13 interposed between the first semiconductor layer 11 and the second semiconductor layer 12. The superlattice structure part 13 is formed of superlattice layers constituted of one or more layers of a first semiconductor thin layer 131 which forms a quantum well at least in a valence band and a second semiconductor thin layer 132 which forms a quantum well in a conduction band.