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    Method for manufacturing nitride semiconductor and method for manufacturing nitride semiconductor device
    3.
    发明专利
    Method for manufacturing nitride semiconductor and method for manufacturing nitride semiconductor device 有权

    公开(公告)号：JP2004014796A

    公开(公告)日：2004-01-15

    申请号：JP2002165956

    申请日：2002-06-06

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： MATSUMOTO OSAMU

    IPC: H01L21/205 ,  H01L21/304 ,  H01L33/32 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a nitride semiconductor device capable of enhancing productivity and a production yield. SOLUTION: Prior to a photolithography process, a mask 16 composed of a SiO 2 film is formed on a coating grown layer 14. The surface of the mask 16 is polished by mechanical abrasion (lapping) so that the height of a projection 15 is set to 1 μm or less, for example. The mask 16 is removed by using a hydrogen fluoride solution. The projection 15 formed on the surface of the coating grown layer 14 is removed, and the surface of the coating grown layer 14 is flattened. In a post-photolithography process, when a photomask is brought into contact with a substrate coated with a nitride semiconductor layer by using a contact-type exposure device, since pressure is equally applied to the whole surface of a substrate 11, cracks of the substrate are prevented. COPYRIGHT: (C)2004,JPO

    Method of manufacturing nitride semiconductor, and method of manufacturing semiconductor element
    4.
    发明专利
    Method of manufacturing nitride semiconductor, and method of manufacturing semiconductor element 有权
    制造氮化镓半导体的方法和制造半导体元件的方法

    公开(公告)号：JP2003017810A

    公开(公告)日：2003-01-17

    申请号：JP2001200628

    申请日：2001-07-02

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： MATSUMOTO OSAMU ,  ANZAI SHINICHI ,  KIJIMA SATORU

    IPC: H01L29/43 ,  C30B33/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/324 ,  H01S5/042 ,  H01S5/323

    CPC classification number: C30B33/00 ,  C30B29/403 ,  C30B29/406 ,  H01L21/28575 ,  H01L21/3245

    Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing nitride semiconductor, by which the contact resistance of a nitride semiconductor with an electrode can be lowered and, at the same time, the stability of the characteristics of the semiconductor can be improved, and to provide a method of manufacturing semiconductor element using the method.
    SOLUTION: After the nitride semiconductor doped with p-type impurity is manufactured, the carbon existing on the surface of the semiconductor is removed and, at the same time, an oxide film is formed on the surface by treating the surface in an active oxygen-containing atmosphere. Thereafter, the semiconductor is made to turn into a p-type semiconductor by activating the p-type impurity. Since the carbon is removed from the surface of the semiconductor and the oxide film is formed on the surface, decomposition of the surface during the course of the activating treatment can be prevented and, at the same time, the activating rate of the p-type impurity can be improved. Therefore, the contact resistance of the semiconductor with the electrode can be lowered, and the variation of the characteristics of the semiconductor can be reduced.
    COPYRIGHT: (C)2003,JPO

    Abstract translation: 要解决的问题：提供一种氮化物半导体的制造方法，能够降低氮化物半导体与电极的接触电阻，能够提高半导体的特性的稳定性， 提供使用该方法制造半导体元件的方法。 解决方案：在制造掺杂有p型杂质的氮化物半导体之后，去除存在于半导体表面上的碳，同时通过在表面上形成氧化膜， 含气氛 此后，通过激活p型杂质使半导体变成p型半导体。 由于从表面除去了碳，在表面形成氧化膜，因此可以防止在活化处理过程中表面的分解，同时，p型的活化率 可以改善杂质。 因此，能够降低半导体与电极的接触电阻，能够降低半导体的特性的变化。

    METHOD AND APPARATUS FOR CONTROLLING GROWTH OF SEMICONDUCTOR CRYSTAL
    6.
    发明专利
    METHOD AND APPARATUS FOR CONTROLLING GROWTH OF SEMICONDUCTOR CRYSTAL 失效

    公开(公告)号：JPH08148433A

    公开(公告)日：1996-06-07

    申请号：JP29101794

    申请日：1994-11-25

    Applicant: SONY CORP

    Inventor： MATSUMOTO OSAMU ,  ITO SATORU

    IPC: C30B25/16 ,  C30B35/00 ,  H01L21/203 ,  H01L21/363

    Abstract: PURPOSE: To improve reproducibility and composition controllability by successively detecting the growing-temperature and/or the composition during the growth and by providing a feedback with respect to the difference between them and set values thereof. CONSTITUTION: In a first procedure S1, an epitaxial growth layer is irradiated by an energy beam and the light emitted therefrom is detected. In a second procedure S2, crystallizabilities are discriminated and requirements for epitaxial growth are found out from the wavelength and the intensity of the detected emitted light. In a third procedure S3, the values of the found out epitaxial growth requirements and the set values thereof upon detection of the emitted light are compared to calculate the difference therebetween, and current epitaxial growth requirements are updated based on that difference. In a fourth procedure S4, epitaxial growth is carried out under the updated epitaxial growth requirements. In a fifth procedure S5, it is decided whether the control of the epitaxial growth requirements is to be continued or terminated, and if it is decided to be continued, the first pocedure ff. are instructed to be carried out again.

    GROWTH OF II-VI COMPOUND SEMICONDUCTOR
    7.
    发明专利
    GROWTH OF II-VI COMPOUND SEMICONDUCTOR 失效

    公开(公告)号：JPH07273054A

    公开(公告)日：1995-10-20

    申请号：JP31751494

    申请日：1994-11-28

    Applicant: SONY CORP

    Inventor： ISHIBASHI AKIRA ,  ITO SATORU ,  MATSUMOTO OSAMU ,  SHIRAISHI SEIJI ,  MINATOYA RIKAKO ,  HIEI FUTOSHI

    IPC: H01L21/205 ,  H01L21/203 ,  H01L21/363 ,  H01S5/00 ,  H01S3/18

    Abstract: PURPOSE:To allow growth of a p-type II-VI compound having sufficiently high carrier concentration or a II-VI compound semiconductor having low defect density and excellent crystallization. CONSTITUTION:At the time of vapor growth of a p-type II-VI compound semiconductor on a semiconductor substrate such as a GaAs substrate by a molecular beam epitaxial method, a semiconductor substrate 1 having a main surface being off by a small angle from a (100) surface in the direction by a small angle, and a main surface being off in the (011) direction by a small angle or a main surface being off in the (01-1) direction by a small angle further a main surface being off in the (011) direction by a small angle is used. In order to make a II-VI compound semiconductor of low defect density to grow, especially the semiconductor substrate 1 having a main surface being off from the (100) in the (01-1) direction by a small angle is used.

    GaN-SYSTEM SEMICONDUCTOR DEVICE
    9.
    发明专利
    GaN-SYSTEM SEMICONDUCTOR DEVICE 有权

    公开(公告)号：JP2004023050A

    公开(公告)日：2004-01-22

    申请号：JP2002179875

    申请日：2002-06-20

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： GOTO OSAMU ,  MATSUMOTO OSAMU ,  SASAKI TOMOMI ,  IKEDA MASAO

    IPC: H01L33/06 ,  H01L33/14 ,  H01L33/32 ,  H01L33/36 ,  H01L33/44 ,  H01S5/02 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

    CPC classification number: H01S5/0207 ,  H01S5/0014 ,  H01S5/0422 ,  H01S5/2201 ,  H01S5/32341

    Abstract: PROBLEM TO BE SOLVED: To provide a GaN semiconductor light-emitting device which is formed on a GaN single-crystal substrate and has a structure the current leakage is reduced. SOLUTION: In the GaN semiconductor laser device 50, a p-side electrode and an n-side electrode are disposed on a laminated structure-side. The device has the same structure as that of a conventional GaN semiconductor layer device formed on a sapphire substrate, except that the laminated structure of a GaN compound semiconductor layer is formed directly on the GaN single-crystal substrate 52, without installing a GaN-ELO structure layer by using the GaN single crystal substrate 52, instead of the sapphire substrate. The GaN single-crystal substrate 50 has core parts 52a in continuous band shapes of 10μm width, and the interval between the core part 52a and the core part 52a is about 400μm. A laser stripe 30, a pad metal 37 of the p-side electrode 36 and the n-side electrode 38 are disposed in the laminated structure on a region, except the core part 52a of the GaN single crystal substrate 50. A horizontal distance S p between the pad metal 37 and an outer peripheral edge of the core part 52a and a horizontal distance S n between the n-side electrode 38 and the outer peripheral edge of the core part 52a are 95μm. COPYRIGHT: (C)2004,JPO

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