公开(公告)号：US11840446B2

公开(公告)日：2023-12-12

申请号：US16908666

申请日：2020-06-22

Applicant: UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION, INC.

Inventor： Swaminathan Rajaraman ,  Charles Didier ,  Avra Kundu

IPC: B81C1/00 ,  B81B1/00 ,  C12M1/34 ,  G01N33/50

CPC classification number: B81C1/00111 ,  B81B1/008 ,  C12M41/46 ,  G01N33/5082 ,  B81B2201/055 ,  B81C2201/0146

Abstract: Disclosed herein is a microelectrode platform that may be used for multiple biosystem applications including cell culturing techniques and biosensing. Also disclosed are microfabrication techniques for inexpensively producing microelectrode platforms.

公开(公告)号：US08709848B2

公开(公告)日：2014-04-29

申请号：US13088100

申请日：2011-04-15

Applicant: Srivatsa G. Kundalgurki ,  Scott Dye

Inventor： Srivatsa G. Kundalgurki ,  Scott Dye

IPC: H01L21/02 ,  H01L21/3065

CPC classification number: G01L9/0042 ,  B81C1/00047 ,  B81C2201/0123 ,  B81C2201/0146 ,  B81C2201/017 ,  H01L21/02057 ,  H01L21/30608 ,  H01L21/3065

Abstract: MEMS devices (40) using etched cavities (42) are desirably formed using multiple etching steps. Preliminary cavities (20) formed by locally anisotropic etching to nearly the final depth have irregular (46) sidewalls (44) and steep and/or inconsistent sidewall (44) to bottom (54) intersection angles (48). This leads to less than desired cavity diaphragm (26) burst strengths. Final cavities (42) with smooth sidewalls (50), smaller and consistent sidewall (50) to bottom (54) intersection angles (58), and having more than doubled cavity diaphragm (26) burst strengths are obtained by treating the preliminary cavities (20) with TMAH etchant, preferably relatively dilute TMAH etchant. In a preferred embodiment, a cleaning step is performed between the etching step and the TMAH treatment step to remove any anisotropic etching by-products present on the preliminary cavities' (20) initial sidewalls (44). The multi-step cavity etching procedure is especially useful for forming robust MEMS pressure sensors, but is applicable to any type of MEMS device.

Abstract translation: 期望使用多个蚀刻步骤形成使用蚀刻腔（42）的MEMS器件（40）。 通过局部各向异性腐蚀形成的接近最终深度的初级腔（20）具有不规则的（46）侧壁（44）和陡峭和/或不一致的侧壁（44）至底部（54）交叉角（48）。 这导致比所需的腔膜（26）突发强度小。 通过处理预备空腔（2）获得具有平滑侧壁（50），更小且一致的侧壁（50）到底部（54）交叉角（58）并且具有多于两倍的腔隔膜（26）的突出强度的最终腔（42） 20）与TMAH蚀刻剂，优选相对稀释的TMAH蚀刻剂。 在优选的实施方案中，在蚀刻步骤和TMAH处理步骤之间进行清洁步骤以去除预备空腔（20）初始侧壁（44）上存在的任何各向异性蚀刻副产物。 多阶腔蚀刻程序对于形成坚固的MEMS压力传感器尤其有用，但适用于任何类型的MEMS器件。

公开(公告)号：US07829360B2

公开(公告)日：2010-11-09

申请号：US11898837

申请日：2007-09-17

Applicant: Bernabe J. Arruza ,  Ronald Bozak ,  Kenneth Gilbert Roessler ,  Andrew Dinsdale ,  Tod Evan Robinson ,  David Brinkley

Inventor： Bernabe J. Arruza ,  Ronald Bozak ,  Kenneth Gilbert Roessler ,  Andrew Dinsdale ,  Tod Evan Robinson ,  David Brinkley

IPC: H01L21/00

CPC classification number: B81C1/00634 ,  B81C2201/0146 ,  Y10T29/49778

Abstract: A method of nanomachining is provided. The method includes plunging a nanometer-scaled tip into a surface of a substrate at a first location in a first direction that is substantially perpendicular to the surface, thereby displacing a first portion of the substrate with the tip. The method also includes withdrawing the tip from the substrate in a second direction that is substantially opposite to the first direction. The method further includes moving at least one of the tip and the substrate laterally relative to each other. In addition, the method also includes plunging the tip into the substrate at a second location in a third direction that is substantially parallel to the first direction, thereby displacing a second portion of the substrate with the tip and withdrawing the tip from the substrate in a fourth direction that is substantially opposite to the third direction.

Abstract translation: 提供了一种纳米加工的方法。 该方法包括在基本上垂直于表面的第一方向上的第一位置处将纳米级尖端突入基片的表面，从而使基片的第一部分与尖端移位。 该方法还包括在基本上与第一方向相反的第二方向从衬底取出尖端。 该方法还包括相对于彼此横向移动尖端和衬底中的至少一个。 此外，该方法还包括在基本上平行于第一方向的第三方向上的第二位置处将尖端插入基板，从而使基板的第二部分与尖端移位，并且将尖端从基板中取出 第四方向与第三方向基本相反。

公开(公告)号：US20090283416A1

公开(公告)日：2009-11-19

申请号：US12295321

申请日：2007-04-20

Applicant: Hans-Joachim Quenzer ,  Gerfried Zwicker

Inventor： Hans-Joachim Quenzer ,  Gerfried Zwicker

IPC: B23H3/00 ,  C25D3/46

CPC classification number: B23H3/00 ,  B81C1/00634 ,  B81C2201/0146 ,  C25F3/14

Abstract: Disclosed is a method of treating the surface of an electrically conducting substrate surface wherein a tool comprising an ion-conducting solid material is brought into contact at least in some areas with the substrate surface, the tool is able to conduct the metal ions of the substrate and an electric potential is applied so that an electric potential gradient is applied between the substrate surface and the tool in such a manner that metal ions are drawn from the substrate surface or deposited onto the substrate surface by means of the tool.

Abstract translation: 公开了一种处理导电衬底表面的方法，其中包括离子导电固体材料的工具至少在一些区域与衬底表面接触，该工具能够传导衬底的金属离子 并且施加电位使得在衬底表面和工具之间施加电势梯度，使得金属离子从衬底表面被拉出或通过该工具沉积到衬底表面上。

公开(公告)号：US06902984B2

公开(公告)日：2005-06-07

申请号：US10827933

申请日：2004-04-19

Applicant: Jerome Michael Eldridge

Inventor： Jerome Michael Eldridge

IPC: B81B3/00 ,  H01L21/02 ,  H01L21/311 ,  H01L21/20

CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

公开(公告)号：US20040198016A1

公开(公告)日：2004-10-07

申请号：US10827933

申请日：2004-04-19

Inventor： Jerome Michael Eldridge

IPC: H01L021/20 ,  H01L021/76

CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

公开(公告)号：US06667219B1

公开(公告)日：2003-12-23

申请号：US09651815

申请日：2000-08-30

Applicant: Jerome Michael Eldridge

Inventor： Jerome Michael Eldridge

IPC: H01L2120

CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

公开(公告)号：US20020045287A1

公开(公告)日：2002-04-18

申请号：US09881744

申请日：2001-06-18

Applicant: RANDOX LABORATORIES LIMITED

Inventor： Harold S. Gamble ,  S.J. Neil Mitchell ,  Andrzej Prochaska ,  Stephen Peter Fitzgerald

IPC: H01L021/00

CPC classification number: B81C1/00158 ,  B41J2/16 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1632 ,  B41J2/1639 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0146

Abstract: A method of manufacturing a diaphragm utilizing a precision grinding technique after etching a cavity in a wafer. A technique for preventing distortion of the diaphragm based on use of a sacrificial layer of porous silicon is disclosed.

Abstract translation: 在蚀刻晶片中的空腔之后利用精密研磨技术制造隔膜的方法。 公开了一种基于使用多孔硅牺牲层防止隔膜变形的技术。

公开(公告)号：US20240351865A1

公开(公告)日：2024-10-24

申请号：US18622059

申请日：2024-03-29

Applicant: Xintec Inc.

Inventor： Jiun-Yen LAI ,  Wei-Luen SUEN ,  Ming-Chung CHUNG ,  Chih-Wei LIU

IPC: B81C1/00

CPC classification number: B81C1/00825 ,  B81C2201/013 ,  B81C2201/0143 ,  B81C2201/0146 ,  B81C2201/0159

Abstract: A manufacturing method of a micro electro mechanical system (MEMS) device includes forming a buffer protection layer on a semiconductor structure, wherein the semiconductor structure includes a wafer, a MEMS membrane, and an isolation layer between the wafer and the MEMS membrane, and the buffer protection layer is located in a slit of the MEMS membrane and on a surface of the MEMS membrane facing away from the isolation layer; etching the wafer to form a cavity such that a portion of the isolation layer is exposed though the cavity; etching the portion of the isolation layer; and removing the buffer protection layer.

公开(公告)号：US20240059555A1

公开(公告)日：2024-02-22

申请号：US17766780

申请日：2020-08-24

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Daiki SUZUKI ,  Takahiro MATSUMOTO ,  Tomoyuki IDE ,  Mikito TAKAHASHI

IPC: B81C1/00 ,  G02B26/08

CPC classification number: B81C1/00825 ,  G02B26/0833 ,  B81C2201/0146 ,  B81C2201/0132

Abstract: A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer and a device layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer and the device layer from the wafer by etching and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning for cleaning the wafer using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a circulation hole penetrating the wafer is formed at a part other than the slit in the wafer by the etching.