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公开(公告)号：KR100398046B1
公开(公告)日：2003-09-19
申请号：KR1020010047622
申请日：2001-08-08
Applicant: 한국전자통신연구원
IPC: H01L21/768
Abstract: PURPOSE: A method for fabricating a metal interconnection of a semiconductor device is provided to prevent a fine pillar-type metal pattern, by making metal layers connected by a pillar-type metal pattern, by forming the metal pattern after a process for patterning a metal layer for forming a lower metal interconnection, by having the lower metal interconnection and the metal pad made of a metal layer, and by making the lower portion of the metal pattern broader than the upper portion. CONSTITUTION: An interlayer dielectric is formed on a semiconductor substrate(301) and patterned to form a contact hole so that a predetermined portion of the substrate is exposed. A metal layer and an anti-reflective coating(ARC) are sequentially formed on the interlayer dielectric to fill the contact hole. The ARC is patterned. The metal layer in the exposed portion is etched to form a lower metal interconnection. After a photoresist layer is formed, a predetermined photoresist layer pattern is formed on the ARC. The photoresist layer is patterned to make the photoresist layer left between the lower metal interconnections. After the ARC is patterned, the metal layer in the exposed portion is etched to form the metal pattern. After a spacer(306) is formed on the sidewall of the metal pattern and the lower metal interconnection, the metal layer in the exposed portion is etched. The second interlayer dielectric(313) is formed and planarized until the surface of the metal pattern is exposed. A metal interconnection is formed on the second interlayer dielectric.
Abstract translation: 目的：提供一种用于制造半导体器件的金属互连的方法，以通过在用于图案化金属图案的工艺之后形成金属图案来制造通过柱型金属图案连接的金属层来防止细柱型金属图案 通过使下金属互连和由金属层制成的金属焊盘以及通过使金属图案的下部比上部宽而形成下金属互连。 构成：在半导体衬底（301）上形成层间电介质并将其图案化以形成接触孔，使得衬底的预定部分被暴露。 在层间电介质上顺序形成金属层和抗反射涂层（ARC）以填充接触孔。 ARC是图案化的。 暴露部分中的金属层被蚀刻以形成下金属互连。 在形成光致抗蚀剂层之后，在ARC上形成预定的光致抗蚀剂层图案。 将光致抗蚀剂层图案化以使光致抗蚀剂层留在下金属互连之间。 在ARC被图案化之后，暴露部分中的金属层被蚀刻以形成金属图案。 在金属图案的侧壁和下金属互连上形成间隔件（306）之后，蚀刻暴露部分中的金属层。 形成并平坦化第二层间电介质（313），直到金属图案的表面暴露。 在第二层间电介质上形成金属互连。
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公开(公告)号：KR101087136B1
公开(公告)日：2011-11-25
申请号：KR1020080122215
申请日：2008-12-04
Applicant: 한국전자통신연구원
IPC: H01L21/324
Abstract: 본 발명은 실리콘 웨이퍼 기판의 적재가 용이할 뿐만 아니라 초기 열산화 공정 시 발생될 수 있는 자연 산화막 발생을 최대한 억제할 수 있고, 반응 가스의 균일할 확산을 유도하여 균일한 두께의 산화막을 발생시킬 수 있는 반도체 제조용 횡형 확산로에 관한 것으로서, 상기 횡형 확산로는, 상하로 개폐가능하며 그 내부에 다수의 실리콘 웨이퍼 기판이 적재되는 적재 수단과, 상기 적재 수단을 수평 방향으로 이동시켜 상기 반응실 내부로 이동시키는 운반 수단과, 상기 운반 수단에 의해 적재 수단이 반응실 내부로 이동되는 동안 상기 적재 수단의 내부로 질소 가스를 주입하는 질소 가스 주입 수단을 포함하여 이루어진다.
반도체 제조, 열산화, 열확산, 확산로,-
公开(公告)号：KR1020110109498A
公开(公告)日：2011-10-06
申请号：KR1020100029265
申请日：2010-03-31
Applicant: 한국전자통신연구원 , 주식회사 실리콘웍스
IPC: H01L21/336
Abstract: 이중 확산 전계 효과 트랜지스터의 형성 방법이 제공된다. 이중 확산 전계 효과 트랜지스터의 형성 방법은 제1 도전형의 기판에 제공된 제1 도전형의 에피택셜층(Epitaxial Layer)에 제1 트렌치를 형성하는 것, 에피택셜층(Epitaxial Layer) 상부에 제1 트렌치의 측벽과 접하는 제2 도전형의 바디 영역들을 형성하는 것, 에피택셜층(Epitaxial Layer)을 더 식각하여서 제1 트렌치로부터 연장된 제2 트렌치를 형성하여 상기 바디 영역들을 분리하는 것, 제2 트렌치 및 에피택셜층(Epitaxial Layer) 상부 면에 게이트 절연막을 형성하는 것, 및 제2 트렌치 내부에 도전물질을 증착하여서 게이트를 형성하는 것을 포함한다.
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公开(公告)号：KR101016441B1
公开(公告)日：2011-02-21
申请号：KR1020080124277
申请日：2008-12-08
Applicant: 한국전자통신연구원
IPC: H01L29/786
Abstract: 본 발명은 게이트 전극과 소스-드레인 전극 형상 간 오정렬을 방지하고 제조 수율을 향상시킬 수 있는 하부 게이트형 유기박막 트랜지스터 제조 방법을 제공한다. 본 발명에 따른 유기박막 트랜지스터 제조 방법은, 게이트 전극과 게이트 절연막이 형성된 기판 전면 상에 형상반전 감광막과 광 표백물질막을 도포하는 단계와, 마스크를 사용하여 상기 형상반전 감광막 중에서 필드 영역의 감광막만을 선택적으로 감광시키는 단계와, 상기 형상 반전 감광막 중에서 상기 게이트 전극 상부에 위치한 감광막이 감광되고 소스-드레인 전극 형성 영역의 감광막은 감광되지 않도록 전면 노광을 실시하는 단계와, 상기 전면 노광 후, 상기 광 표백물질막을 제거하고, 감광된 상기 필드 영역 및 게이트 전극 상부의 감광막을 형상 반전시키는 단계와, 전면 노광을 실시하여, 형상 반전되지 않은 상기 소스-드레인 전극 형성 영역의 감광막을 감광시키는 단계와, 상기 감광된 소스-드레인 전극 형성 영역의 감광막을 현상액으로 제거하는 단계를 포함한다.
유기박막 트랜지스터, 게이트 전극-
公开(公告)号：KR100934216B1
公开(公告)日：2009-12-29
申请号：KR1020070125515
申请日：2007-12-05
Applicant: 한국전자통신연구원
IPC: H01L29/70
Abstract: A bipolar phototransistor for a short wavelength and a manufacturing method thereof are provided to improve the characteristic of a leakage current by forming an anti-depletion layer in a surface of a base. A first base is formed in a base region(20) by the high energy ion implantation of a first type impurity. A second oxide film is formed in the front side of the substrate. An emitter region(30) and a blocking region are defined in a second oxide film. A second emitter and a second blocking layer are formed by ion-implanting a second impurity to the emitter region and the blocking region. A second anti-depletion layer is formed by ion-implanting the second impurity to the surface of the first base.
Abstract translation: 提供一种用于短波长的双极光电晶体管及其制造方法，以通过在基底的表面中形成抗耗尽层来改善泄漏电流的特性。 通过第一类型杂质的高能离子注入在基区（20）中形成第一基极。 第二氧化物膜形成在衬底的正面。 发射极区域（30）和阻挡区域被限定在第二氧化物膜中。 通过将第二杂质离子注入发射极区域和阻挡区域来形成第二发射极和第二阻挡层。 通过将第二杂质离子注入第一基底的表面来形成第二抗耗尽层。
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Patent Agency Ranking
公开(公告)号：KR1020090058768A
公开(公告)日：2009-06-10
申请号：KR1020070125515
申请日：2007-12-05
Applicant: 한국전자통신연구원
IPC: H01L29/70
CPC classification number: H01L31/1105
Abstract: A bipolar phototransistor for a short wavelength and a manufacturing method thereof are provided to improve the characteristic of a leakage current by forming an anti-depletion layer in a surface of a base. A first base is formed in a base region(20) by the high energy ion implantation of a first type impurity. A second oxide film is formed in the front side of the substrate. An emitter region(30) and a blocking region are defined in a second oxide film. A second emitter and a second blocking layer are formed by ion-implanting a second impurity to the emitter region and the blocking region. A second anti-depletion layer is formed by ion-implanting the second impurity to the surface of the first base.
Abstract translation: 提供一种用于短波长的双极光电晶体管及其制造方法，以通过在基底表面形成抗耗尽层来改善漏电流的特性。 通过第一类型杂质的高能离子注入，在基极区（20）中形成第一基底。 第二氧化膜形成在基板的正面。 在第二氧化物膜中限定发射极区域（30）和阻挡区域。 通过向发射极区域和阻挡区域离子注入第二杂质形成第二发射极和第二阻挡层。 通过将第二杂质离子注入第一基底的表面形成第二抗耗尽层。
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公开(公告)号：KR100872775B1
公开(公告)日：2008-12-09
申请号：KR1020070077862
申请日：2007-08-02
Applicant: 한국전자통신연구원
Abstract: The horizontal diffusion furnace for fabricating semiconductor wafer is provided to facilitate the loading of the silicon wafer in the boat by using a boat having a cover in the thermal oxidation process of the semiconductor wafer. The horizontal diffusion furnace for fabricating semiconductor wafer comprises the reaction chamber(11), the boat(15), the support stand, the carriage(19), the gas injector(17), the gas inlet pipe(13). The reaction chamber has the heating coil(12). The boat has the cover(152) for opening and closing. One or more wafer(16) can be loaded on the boat. The support stand supports the boat. The carriage is combined with the one-side part of the support stand. The carriage moves the boat supported by the support stand to the reaction chamber. The gas injector is formed in the one-side part of the support stand. The gas injector injects the gas into the boat in which wafer is loaded. The gas inlet pipe is formed in the longitudinal direction of the support stand to supply the gas injected through the gas injector to the boat.
Abstract translation: 提供用于制造半导体晶片的水平扩散炉，以通过在半导体晶片的热氧化过程中使用具有盖的船来促进硅晶片在船中的装载。 用于制造半导体晶片的水平扩散炉包括反应室（11），船（15），支撑架，托架（19），气体注入器（17），进气管（13）。 反应室具有加热线圈（12）。 船具有用于打开和关闭的盖（152）。 一个或多个晶片（16）可以装载在船上。 支撑架支撑船。 托架与支撑架的单侧部分组合。 托架将由支撑架支撑的船移动到反应室。 气体喷射器形成在支撑架的一侧部分中。 气体喷射器将气体注入到其中装载晶片的船中。 气体入口管沿着支撑台的纵向方向形成，以将通过气体喷射器喷射的气体供应到船上。
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公开(公告)号：KR1020080038062A
公开(公告)日：2008-05-02
申请号：KR1020070108544
申请日：2007-10-26
Applicant: 한국전자통신연구원
CPC classification number: H01Q7/04 , H01Q1/2208
Abstract: A loop antenna is provided to facilitate installation, to generate a plurality of resonant frequencies, and to improve antenna efficiency without changing the length of the antenna. A loop antenna includes first to third antenna elements and a feed cable. The first antenna element is composed of a coaxial cable(203). The second antenna element is connected to the first antenna element in series and composed of a wire(201). The third antenna element is connected to the first antenna element in series, connected to the other end of an end connected to the first and second antenna elements, composed of the wire, and has one end grounded. The feed cable supplies power to the second antenna element.
Abstract translation: 提供环形天线以便于安装，产生多个谐振频率，并且在不改变天线长度的情况下提高天线效率。 环形天线包括第一至第三天线元件和馈电电缆。 第一天线元件由同轴电缆（203）组成。 第二天线元件串联连接到第一天线元件，并由导线（201）组成。 第三天线元件串联连接到第一天线元件，连接到由导线构成的连接到第一和第二天线元件的端部的另一端，并且一端接地。 馈电电缆为第二天线元件供电。
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公开(公告)号：KR100725261B1
公开(公告)日：2007-06-07
申请号：KR1020050119005
申请日：2005-12-07
Applicant: 한국전자통신연구원
Abstract: A method of manufacturing a nano material is provided to increase reliability of specimen analysis through a transmission electronic microscope and precisely defining a three-dimensional structure of the nano material. A method of manufacturing a nano material includes the steps of mixing a specimen material(205) with a coupling agent(206) such as adhesive, curing, and other materials, inserting the specimen mixture(210), in which the specimen material mixed with the coupling agent, into a tune(211), heating the tube, in which the specimen material is contained, to cure the specimen mixture, cutting the cured specimen material in the tube by appropriate sizes, and flattening the specimen mixture in the cut tube. The tube is heated to 120 to 150 degrees of centigrade for ten minutes.
Abstract translation: 提供制造纳米材料的方法，以通过透射电子显微镜提高样本分析的可靠性并精确地定义纳米材料的三维结构。 制造纳米材料的方法包括以下步骤：将样本材料（205）与诸如粘合剂，固化和其他材料的偶联剂（206）混合;将样本混合物（210）插入样本混合物（210） （211）中，加热其中包含样本材料的管，以固化样本混合物，将管中固化的样本材料切割成合适的尺寸，并且将切割管中的样本混合物变平 。 将管加热至120至150摄氏度十分钟。
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公开(公告)号：KR100651626B1
公开(公告)日：2006-12-01
申请号：KR1020050105262
申请日：2005-11-04
Applicant: 한국전자통신연구원
IPC: H01L23/48 , H01L23/492
Abstract: A method for fabricating a bump of a semiconductor device is provided to prevent a seed metal layer from being corroded by a developing solution so that the sheer strength of a bump is prevented from being decreased, by forming a diffusion blocking layer and a seed metal layer after an exposure and development process is performed. A metal pad is formed in at least a predetermined region on a substrate(S302). A passivation layer is formed on the substrate, exposing at least a partial region of the metal pad(S303). A photoresist layer is formed on the metal pad and the passivation layer(S304). A diffusion blocking layer is formed on the metal pad and the photoresist layer(S306). A seed metal layer is formed on the diffusion blocking layer(S307). A bump is formed on the seed metal layer(S308). The photoresist layer formed under the seed metal layer is eliminated(S310). The diffusion blocking layer remaining on the sidewall of the bump is removed(S311).
Abstract translation: 提供一种用于制造半导体器件的凸块的方法，以防止种子金属层被显影溶液腐蚀，从而通过形成扩散阻挡层和种子金属层来防止凸块的剪切强度降低 在曝光和开发过程之后进行。 在衬底上的至少预定区域中形成金属焊盘（S302）。 钝化层形成在衬底上，暴露金属焊盘的至少一部分区域（S303）。 在金属焊盘和钝化层上形成光致抗蚀剂层（S304）。 在金属焊盘和光致抗蚀剂层上形成扩散阻挡层（S306）。 种子金属层形成在扩散阻挡层上（S307）。 在种子金属层上形成凸块（S308）。 在种子金属层下形成的光致抗蚀剂层被去除（S310）。 保留在凸块侧壁上的扩散阻挡层被去除（S311）。
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