公开(公告)号：DE502004011127D1

公开(公告)日：2010-06-17

申请号：DE502004011127

申请日：2004-03-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOECK JOSEF ,  MEISTER THOMAS ,  STENGL REINHARD ,  SCHAEFER HERBERT

IPC: H01L29/737 ,  H01L21/331 ,  H01L29/08 ,  H01L29/167 ,  H01L29/732

公开(公告)号：DE10318422B4

公开(公告)日：2006-08-10

申请号：DE10318422

申请日：2003-04-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOECK JOSEF ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  STENGL REINHARD

IPC: H01L29/732 ,  H01L21/331 ,  H01L29/08 ,  H01L29/417

Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.

公开(公告)号：DE59712601D1

公开(公告)日：2006-05-11

申请号：DE59712601

申请日：1997-07-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  STENGL REINHARD ,  GRUENING ULRIKE ,  WENDT HERMANN ,  WILLER JOSEF ,  LEHMANN VOLKER ,  FRANOSCH MARTIN ,  SCHAEFER HERBERT ,  KRAUTSCHNEIDER WOLFGANG ,  HOFMANN FRANZ

IPC: H01L21/8247 ,  H01L29/792 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788

Abstract: The invention concerns a non-volatile storage cell having a MOS transistor which, as gate dielectric, comprises a triple dielectric layer (5) consisting of a first silicon oxide layer (51), a silicon nitride layer (52) and a second silicon oxide layer (53). The MOS transistor gate electrode comprises p -doped silicon such that, when a negative voltage is applied to the gate electrode, holes tunnel predominantly from the channel area (4) through the first silicon oxide layer (51) and into the silicon nitride layer (52).

公开(公告)号：DE50205382D1

公开(公告)日：2006-01-26

申请号：DE50205382

申请日：2002-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOECK JOSEF ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  STENGL REINHARD

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/082 ,  H01L27/12

公开(公告)号：DE10324081B4

公开(公告)日：2005-11-17

申请号：DE10324081

申请日：2003-05-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISINGER HANS ,  STENGL REINHARD ,  SCHAEFER HERBERT

IPC: G11C13/02 ,  H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L51/00 ,  H01L51/30 ,  G11C11/21 ,  G11C19/00 ,  H01L21/762

公开(公告)号：DE10317098A1

公开(公告)日：2004-07-22

申请号：DE10317098

申请日：2003-04-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEISTER THOMAS ,  BOECK JOSEF ,  SCHAEFER HERBERT ,  STENGL REINHARD

IPC: H01L21/331 ,  H01L29/06 ,  H01L29/08 ,  H01L29/737

Abstract: Production of bipolar transistor involves formation of semiconductor substrate with n type collector region, provision of single crystal p type base region and basic p type junction region over the basic n,p region, provision of insulation region over base p type junction region, formation of window (F) in the insulation region, provision of side wall spacers in the window, and differential separation and structuring of emitter layer.

公开(公告)号：DE10231407A1

公开(公告)日：2004-02-19

申请号：DE10231407

申请日：2002-07-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROMANYUK ANDRIY ,  MEISTER THOMAS ,  BOECK JOSEF ,  SCHAEFER HERBERT

IPC: H01L21/28 ,  H01L21/331 ,  H01L29/167 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732

Abstract: A bipolar transistor and method of making a bipolar transistor is disclosed. In one embodiment, the bipolar transistor includes a polysilicon layer into which impurity atoms are inserted, thereby reducing the layer resistance.

公开(公告)号：DE10151132A1

公开(公告)日：2003-05-08

申请号：DE10151132

申请日：2001-10-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12

Abstract: The invention concerns a semiconductor structure comprising a substrate (10), an insulating layer (14) arranged on one surface of the substrate (10), a layer (18) for components arranged on one surface (16) of the insulating layer (14) opposite the substrate (10), a semiconductor component (30a, 30b) arranged in the layer (18) for components and zone designed for capacitively uncoupling said semiconductor component (30a, 30b) relative to the substrate (10), said zone being formed by a space charge zone (96) formed in a region of the substrate (10) adjacent to the insulating layer (14).

公开(公告)号：DE19958062C2

公开(公告)日：2002-06-06

申请号：DE19958062

申请日：1999-12-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS F ,  SCHAEFER HERBERT ,  FRANOSCH MARTIN ,  BOECK JOSEF ,  KLEIN WOLFGANG

IPC: H01L21/331 ,  H01L29/732 ,  H01L21/8222 ,  H01L27/082

Abstract: The bipolar transistor is produced such that a connection region of its base is provided with a silicide layer, so that a base resistance of the bipolar transistor is small. No silicide layer is produced between an emitter and an emitter contact and between a connection region of a collector and a collector contact. The base is produced by in situ-doped epitaxy in a region in which a first insulating layer is removed by isotropic etching such that the connection region of the base which is arranged on the first insulating layer is undercut. In order to avoid defects of a substrate in which the bipolar transistor is partly produced, isotropic etching is used for the patterning of auxiliary layers, whereby etching is selective with respect to auxiliary layers lying above, which are patterned by anisotropic etching.

公开(公告)号：DE10005442A1

公开(公告)日：2001-08-16

申请号：DE10005442

申请日：2000-02-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHART ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  FRANOSCH MARTIN

IPC: H01L21/331 ,  H01L29/732 ,  H01L29/737

Abstract: The invention relates to a bipolar transistor (20) and to a method for producing the same. The inventive bipolar transistor (20) comprises a first layer (30) disposed on a substrate (10) in which layer a collector (31) is provided, a second layer (40) disposed on the first layer (30) and provided with a base recess (41) with a base (42), and at least one further, third layer (50) disposed on the second layer (40) and provided with a feed line (51) for the base (42). Said feed line (51) is in direct contact with the base (42) in a transitional zone (52) and the third layer (50) is provided with an emitter recess (53) with an emitter. The bipolar transmitter is further provided with an undercut (43) that is disposed in the second layer (40) adjoining the base recess (41) between the first (30) and the third (50) layer, said base (42) being at least partially located also in the undercut (43). In order to obtain an as low a transition resistance as possible between the feed line (51) and the base (42), an intermediate layer (70) is provided between the first (30) and the second (40) layer, said intermediate layer (70) being selectively etchable to the second layer (40). At least in the zone of the undercut (43) between the feed line (51) and the base (42) a base connection zone (45) is provided that can be adjusted independent of other production conditions. The inventive transistor is further characterized in that the intermediate layer (70) is removed in the contact zone (46) with the base (42).