44.
    发明专利
    未知

    公开(公告)号:DE69518977T2

    公开(公告)日:2001-03-22

    申请号:DE69518977

    申请日:1995-06-30

    Abstract: A reference voltage generator having a dual slope temperature characteristic, for use in an automotive alternator voltage regulator, comprises a bandgap circuit (R1,R2,R3,R4) which generates a voltage (A) having a thermal drift coefficient of zero and a voltage (B) having a non-zero thermal drift coefficient. These voltages are applied to a voltage divider (R5,R6) and a voltage-follower type of circuit (OPA1). A unidirectional conduction amplifier circuit (OPA2) has an input terminal connected to an intermediate point (C) on the voltage divider. A second voltage divider (R7,R8) is connected between the output terminals of the voltage-follower circuit (D) and the amplifier circuit (E). An intermediate node (F) of the second voltage divider is coupled to an output terminal (VREF) of the generator.

    46.
    发明专利
    未知

    公开(公告)号:DE69518977D1

    公开(公告)日:2000-11-02

    申请号:DE69518977

    申请日:1995-06-30

    Abstract: A reference voltage generator having a dual slope temperature characteristic, for use in an automotive alternator voltage regulator, comprises a bandgap circuit (R1,R2,R3,R4) which generates a voltage (A) having a thermal drift coefficient of zero and a voltage (B) having a non-zero thermal drift coefficient. These voltages are applied to a voltage divider (R5,R6) and a voltage-follower type of circuit (OPA1). A unidirectional conduction amplifier circuit (OPA2) has an input terminal connected to an intermediate point (C) on the voltage divider. A second voltage divider (R7,R8) is connected between the output terminals of the voltage-follower circuit (D) and the amplifier circuit (E). An intermediate node (F) of the second voltage divider is coupled to an output terminal (VREF) of the generator.

    47.
    发明专利
    未知

    公开(公告)号:DE69032087D1

    公开(公告)日:1998-04-09

    申请号:DE69032087

    申请日:1990-12-13

    Abstract: A low-noise preamplifier stage, in particular for magnetic heads, which comprises a differential circuit (T5,T6) and a single-transistor output stage (T2). The differential stage has an intrinsic offset voltage, is ground-connectable and can be directly coupled to the magnetic head (L) , the two transistors forming the differential circuit (T5,T6) having different bias currents in order to reduce the input equivalent noise. The base terminal of the first transistor (T5) of the differential circuit defines an input (IN) of the stage which can be connected directly to a terminal of the magnetic head (L); the other terminal of the head can be connected directly to the ground. The base terminal of the other transistor (T6) of the differential circuit (T5,T6) is connected to the intermediate point of a pair of resistors (R1,R2) which are mutually connected in series between the single transistor of the output stage (T2) and a line at reference voltage. In this manner the differential stage (T5,T6) biases the output with its offset voltage without requiring additional components for this purpose.

    48.
    发明专利
    未知

    公开(公告)号:IT1236927B

    公开(公告)日:1993-04-26

    申请号:IT2281989

    申请日:1989-12-22

    Abstract: A low-noise preamplifier stage, in particular for magnetic heads, which comprises a differential circuit (T5,T6) and a single-transistor output stage (T2). The differential stage has an intrinsic offset voltage, is ground-connectable and can be directly coupled to the magnetic head (L) , the two transistors forming the differential circuit (T5,T6) having different bias currents in order to reduce the input equivalent noise. The base terminal of the first transistor (T5) of the differential circuit defines an input (IN) of the stage which can be connected directly to a terminal of the magnetic head (L); the other terminal of the head can be connected directly to the ground. The base terminal of the other transistor (T6) of the differential circuit (T5,T6) is connected to the intermediate point of a pair of resistors (R1,R2) which are mutually connected in series between the single transistor of the output stage (T2) and a line at reference voltage. In this manner the differential stage (T5,T6) biases the output with its offset voltage without requiring additional components for this purpose.

Patent Agency Ranking