Abstract:
PURPOSE: A method of forming a high dielectric layer using an atomic layer deposition method and a method of manufacturing a capacitor having the high dielectric layer are provided to improve leakage current characteristics by reducing defects in the high dielectric layer. CONSTITUTION: A precursor including metal elements is supplied and a purging process is performed. An oxidizing agent is supplied and a purging process is performed. A reaction source including a nitrogen element is supplied and a purging process is performed. The precursor including metal elements is formed with an Hf precursor and a high dielectric layer is formed with an HfON layer.
Abstract:
PURPOSE: An atomic layer deposition system and a method of vaporizing an atomic layer deposition source are provided to prevent the decomposition of the liquefied source generated from a process for heating the liquefied source and acquire stably high-density source without altering the atomic layer deposition system. CONSTITUTION: A transport gas tube(100) is used for transporting a gas. A source container(200) is used for storing a liquefied source including a deposition element and includes a sprayer for spraying the liquefied source. An intermediate gas tube(300) is used for transferring the sprayed source from the source container. A heating container(400) is used for storing the sprayed source and heating the sprayed source. A source gas tube(500) is used for transferring the heated source. A deposition chamber(600) is used for depositing the heated source.
Abstract:
PURPOSE: A semiconductor device having a cylinder type storage node is provided to be capable of minimizing the deformation of the storage node due to a post heat treatment. CONSTITUTION: A semiconductor device has a cylinder type storage node(47), wherein the storage node is made of a polysilicon layer(43) and a metal containing layer(45). Preferably, the metal containing layer is made of precious metal or metal nitride. The lower portion of the cylinder type storage node is supported by a supporter layer(21) and an etch stop layer(31) formed on the supporter layer. Preferably, a surface oxidation barrier is formed between the cylinder type storage node and a dielectric layer. Preferably, the surface oxidation barrier is made of one selected from a group consisting of the first silicon nitride layer deposited by an ALD(Atomic Layer Deposition) method, the second silicon nitride layer deposited by an RTN(Rapid Thermal Nitridation) method, or an oxide aluminum layer.
Abstract:
PURPOSE: A method of forming a capacitor of a semiconductor device for improving a characteristic of a leakage current on a boundary between a dielectric layer and an upper electrode are provided to improve the characteristic of a leakage current by restraining an unstable state of the boundary between the dielectric layer and the upper electrode. CONSTITUTION: A bottom electrode is formed on a semiconductor substrate(110). At this time, an interlayer dielectric is arranged between the semiconductor substrate and the bottom electrode. A rapid thermal nitridation process is performed(120). A bugger layer is formed between the interlayer dielectric and the bottom electrode. A dielectric layer is formed on the buffer layer(130). A top electrode is formed on the bottom electrode(140). The first thermal process is performed under temperature of 200 to 250 degrees centigrade by using O2 gas or N2O gas or O3 gas(150). The second thermal process is performed under vacuum atmosphere(160).
Abstract:
PURPOSE: A method for manufacturing semiconductor devices is provided to increase the throughput per unit time by reducing a temperature stabilization time of a wafer when semiconductor devices are manufactured using a sheet type equipment. CONSTITUTION: A method for manufacturing semiconductor devices stabilizes a wafer loaded to a chamber and performs a given process for the stabilized wafer. In order to increase the throughput of wafers per unit time by reducing the time consumed in the process stabilization step, the chamber pressure in the process stabilization step is maintained to be higher that in the process implementation step for a given hour.
Abstract:
상부전극과 하부전극사이에 다층 유전막이 형성되어 있되, 그 중간층에 비정질층이 형성되어 있는 반도체 장치의 커패시터 및 그 제조방법이 개시되어 있다. 다층 유전막의 중간에 상기 비정질층이 형성되어 있어, 상기 비정질층 상에 형성된 유전막에 보이드와 같은 결함이 형성되더라도, 이러한 결함이 상기 비정질층 아래에 형성된 유전막 및 하부전극에 까지 퍼지는 것을 방지할 수 있다. 따라서, 커패시터의 유전막 누설전류 특성이 개선될 수 있고, 반도체 장치가 오동작되는 것이 방지될 수 있다.
Abstract:
PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to reduce the trap density between an electrode of the capacitor and a dielectric layer by heat-treating the dielectric layer in a hydrogen atmosphere. CONSTITUTION: A lower electrode is formed on a semiconductor substrate(10). A dielectric layer is formed on the lower electrode(12). Then, the dielectric layer is heat-treated in a hydrogen atmosphere(14). After that, an upper electrode is formed on the dielectric layer(18). When the dielectric layer is heat-treated in the hydrogen atmosphere, H2 gas or H2 plasma is supplied. The heat treatment process is carried out in the temperature of 300 to 600°C for 5 to 60 minutes. The lower electrode is comprised of any one selected from the group consisting of polysilicon, metal, metal silicide and metal nitride.
Abstract:
PURPOSE: A method is to form a capacitor by using a hemispherical grain silicon layer to improve the characteristics of a memory cell. CONSTITUTION: A method is to form a hemispherical grain silicon layer(19) having grains of different size on the surface of a bottom electrode pattern(18) by forming the bottom electrode pattern comprising a crystalline layer(15) and an amorphous layer on a semiconductor substrate. The method minimizes the reduction of the surface area of the bottom electrode and prevents neighboring bottom electrodes from being connected.
Abstract:
반도체 장치의 커패시터(capacitor) 형성 방법을 개시한다. 본 발명의 일 관점은 하부 전극 상에 유전막을 형성한다. 유전막 상에 반응 방지막 및 금속 실리사이드막(metal silicide layer) 등으로 이루어지는 상부 전극을 형성한다. 상부 전극 상에 패터닝 보호막을 형성한다. 패터닝 보호막 및 상부 전극을 패터닝한다. 패터닝 보호막은 폴리 실리콘막(poly silicon layer) 등과 같은 도전 물질로 이루어진다.
Abstract:
램프가열 방식의 매엽식 장비를 이용하는 반도체장치의 제조방법에 대해 개시되어 있다. 이 방법은, 웨이퍼를 챔버내로 로딩하는 단계와, 챔버의 압력과 웨이퍼의 온도를 공정압력 및 공정온도보다 높게 상승시키는 단계와, 챔버의 압력 및 웨이퍼의 온도를 공정압력 및 공정온도로 하강시키는 단계와, 웨이퍼를 이용하여 소정의 공정을 진행하는 단계, 및 챔버의 진공을 해제하고 챔버 및 가스 주입관에 잔류하는 가스를 정화시키는 단계를 구비하여 이루어진다.