公开(公告)号：KR1020040067567A

公开(公告)日：2004-07-30

申请号：KR1020030004755

申请日：2003-01-24

Applicant: 삼성전자주식회사

Inventor： 하상록 ,  송효준 ,  김이권

IPC: G03F7/16

Abstract: PURPOSE: Provided is a photoresist coating apparatus for the manufacture of a semiconductor, which simplifies constitutional elements and reduces processing steps to improve the work efficiency and to reduce the manufacturing cost. CONSTITUTION: The photoresist coating apparatus comprises: a coating unit(200) for carrying out coating of a photoresist on a wafer(70); a gathering tank(232) disposed inside of the coating unit(200) for gathering residual photoresist after the coating step; a drain line(220) connected to the gathering tank(232) at one end thereof for discharging the gathered photoresist; and storage tanks(242,244) connected to the other end of the drain line(220) for storing the photoresist discharged from the drain line(220). In the photoresist coating apparatus, a plurality of storage tanks(242,244) are provided to the number corresponding to the kinds of the photoresist used in the coating step. The drain line(220) is branched into each storage tank(242,244), wherein the branching point of the drain line is equipped with a changeover valve(260) for changing a path.

Abstract translation: 目的：提供一种用于制造半导体的光致抗蚀剂涂覆装置，其简化结构元件并减少加工步骤以提高工作效率并降低制造成本。 构成：光致抗蚀剂涂覆装置包括：涂覆单元（200），用于在晶片（70）上进行光致抗蚀剂的涂覆; 设置在所述涂布单元（200）内部的用于在所述涂布步骤之后聚集残留光致抗蚀剂的聚集槽（232） 排出管线（220），其在其一端连接到收集罐（232），用于排出聚集的光致抗蚀剂; 以及连接到排水管线（220）的另一端的储存罐（242,244），用于存储从排水管线（220）排放的光致抗蚀剂。 在光致抗蚀剂涂布装置中，在与涂布步骤中使用的光致抗蚀剂的种类相对应的数量上设置有多个储罐（242,244）。 排水管线（220）分支到每个储罐（242,244）中，其中排水管线的分支点配备有用于改变路径的转换阀（260）。

公开(公告)号：KR1020040057816A

公开(公告)日：2004-07-02

申请号：KR1020020084633

申请日：2002-12-26

Applicant: 삼성전자주식회사

Inventor： 손홍성 ,  하상록 ,  구자응

IPC: H01L27/108

CPC classification number: H01L28/40 ,  H01L27/0805

Abstract: PURPOSE: A method for manufacturing a capacitor having metal electrodes is provided to prevent the deformation of a photoresist pattern by forming an upper electrode using one or two-step wet etching process alone. CONSTITUTION: A plurality of lower metal lines(55a,55b) are formed on a semiconductor substrate(51). An insulating layer(57) is formed on the entire surface of the resultant structure. An upper metal electrode layer(59) and a buffer oxide layer(61) are sequentially formed on the insulating layer. A photoresist pattern(63) is formed on the buffer oxide layer. A buffer oxide pattern and an upper metal electrode are sequentially formed by carrying out a wet etching process on the resultant structure using the photoresist pattern as an etching mask.

Abstract translation: 目的：提供一种用于制造具有金属电极的电容器的方法，以通过仅使用一步或两步湿蚀刻工艺形成上电极来防止光致抗蚀剂图案的变形。 构成：在半导体衬底（51）上形成多个下金属线（55a，55b）。 在所得结构的整个表面上形成绝缘层（57）。 在绝缘层上依次形成上金属电极层（59）和缓冲氧化物层（61）。 在缓冲氧化物层上形成光致抗蚀剂图案（63）。 通过使用光致抗蚀剂图案作为蚀刻掩模对所得到的结构进行湿蚀刻处理，顺序地形成缓冲氧化物图案和上部金属电极。

公开(公告)号：KR1020040006369A

公开(公告)日：2004-01-24

申请号：KR1020020040626

申请日：2002-07-12

Applicant: 삼성전자주식회사

Inventor： 한자형 ,  하상록 ,  손홍성

IPC: H01L21/304

Abstract: PURPOSE: A method for cleaning a semiconductor substrate is provided to prevent the generation of watermarks by using the hydrophilic solution to clean the semiconductor substrate having an exposed hydrophobic layer. CONSTITUTION: A semiconductor substrate is loaded by a load station(S410). The semiconductor substrate is rinsed in the first station by using deionized solution and the residual particles are removed from the semiconductor substrate by using a brush(S420). The semiconductor substrate is cleaned in the second station by using the chemical solution(S430). The semiconductor substrate is cleaned in the third station by using the volatile solution(S440). The cleaned semiconductor substrate is unloaded to the next process(S450).

Abstract translation: 目的：提供一种用于清洁半导体衬底的方法，以通过使用亲水溶液来清洁具有暴露的疏水层的半导体衬底来防止产生水印。 构成：半导体衬底由负载工位加载（S410）。 通过使用去离子溶液在第一工位中冲洗半导体衬底，并且通过使用刷子将剩余的颗粒从半导体衬底移除（S420）。 通过使用化学溶液在第二工位中清洗半导体衬底（S430）。 通过使用挥发性溶液在第三工位中清洗半导体衬底（S440）。 将清洁的半导体衬底卸载到下一工序（S450）。

公开(公告)号：KR1020030081995A

公开(公告)日：2003-10-22

申请号：KR1020020020470

申请日：2002-04-15

Applicant: 삼성전자주식회사

Inventor： 여인준 ,  윤병문 ,  김경현 ,  하상록 ,  남정림 ,  조현호

IPC: H01L21/304

CPC classification number: H01L21/67051 ,  B08B3/12 ,  Y10S134/902

Abstract: PURPOSE: A wafer cleaning equipment is provided to be capable of preventing the damage of patterns formed at the upper portion of the wafer by using high frequency acoustic energy. CONSTITUTION: A wafer cleaning equipment is provided with a cleaning material supply part for forming a cleaning material layer(300) on the surface of a wafer(100), an energy condensing alleviation part(200) installed at one side of the wafer for prolonging the cleaning material layer to the outside of the wafer, a bar type probe(400) located across the energy condensing alleviation part parallel with the upper surface of the wafer for supplying high frequency acoustic vibration energy, a vibrator(500) connected to the rear portion of the probe for generating acoustic vibration. Preferably, the wafer cleaning equipment further includes a rotating shaft for rotating the wafer.

Abstract translation: 目的：提供晶片清洁设备，以便能够通过使用高频声能来防止在晶片上部形成的图案的损坏。 构成：晶片清洁设备设置有用于在晶片（100）的表面上形成清洁材料层（300）的清洁材料供应部件，安装在晶片一侧的能量冷凝减轻部件（200），用于延长 所述清洁材料层到所述晶片的外部;棒状探针（400），位于与所述晶片的上表面平行的用于提供高频声波振动能的平面上的所述能量冷凝减轻部分;振动器（500），连接到所述后部 用于产生声振动的探头部分。 优选地，晶片清洁设备还包括用于旋转晶片的旋转轴。

公开(公告)号：KR100400030B1

公开(公告)日：2003-09-29

申请号：KR1020000030800

申请日：2000-06-05

Applicant: 삼성전자주식회사

Inventor： 이종원 ,  윤보언 ,  하상록

IPC: H01L21/302

CPC classification number: H01L21/3212 ,  C09G1/02

Abstract: A slurry for use in chemical mechanical polishing (CMP) of a metal layer. The CMP slurry includes an abrasive, a plurality of oxidizing agents, a stabilizer including an organic acid having a carboxyl group, a corrosion inhibitor which suppresses corrosion of a metal, a fluorine compound which reduces a difference in removal rates of a metal layer and a barrier layer, and deionized water. The plurality of oxidizing agents include a second oxidizing agent which oxidizes the metal and a first oxidizing agent which restores an oxidizing ability of the second oxidizing agent.

Abstract translation: 用于金属层的化学机械抛光（CMP）的浆料。 CMP浆料含有研磨剂，多种氧化剂，包含具有羧基的有机酸的稳定剂，抑制金属腐蚀的腐蚀抑制剂，减少金属层的去除率的差异的氟化合物和 阻隔层和去离子水。 多种氧化剂包括氧化金属的第二氧化剂和恢复第二氧化剂的氧化能力的第一氧化剂。

公开(公告)号：KR200328236Y1

公开(公告)日：2003-09-26

申请号：KR2020030019959

申请日：2003-06-24

Applicant: 삼성전자주식회사

Inventor： 김길용 ,  하상록 ,  이상훈

IPC: F17D1/08

Abstract: 식별성을 갖는 배관설비를 제공한다. 이 배관설비의 각 배관은 화학물질에 따라 고유의 색상으로 구별되어 있어 식별이 가능하다. 배관의 교체 및 수리작업 시 배관의 오염을 방지하기 위하여 각각의 배관은 체결구에 의해 결합되어 연장되되, 상기 체결구에 의해 결합되는 배관의 결합부에는 색상이 표시되지 않는다.

公开(公告)号：KR100396878B1

公开(公告)日：2003-09-02

申请号：KR1020000042153

申请日：2000-07-22

Applicant: 삼성전자주식회사

Inventor： 이종원 ,  윤보언 ,  이근택 ,  하상록

IPC: H01L21/28

Abstract: PURPOSE: A method for manufacturing a metal interconnection by using a plating process is provided to improve productivity and reliability of a semiconductor device, by reducing a polished quantity of a chemical mechanical polishing(CMP) process. CONSTITUTION: A recess region is formed on an insulating layer(20) formed on a substrate. A diffusion blocking layer is formed on the entire surface of the resultant structure having the recess region. A seed layer(24) for plating is formed only on the diffusion blocking layer in the recess region. A conductive plating layer is formed on the seed layer by a plating process.

Abstract translation: 目的：通过减少化学机械抛光（CMP）工艺的抛光量，提供了一种通过使用电镀工艺来制造金属互连的方法，以提高半导体器件的生产率和可靠性。 构成：在形成于基板上的绝缘层（20）上形成凹部区域。 在具有凹陷区的所得结构的整个表面上形成扩散阻挡层。 仅在凹陷区域中的扩散阻挡层上形成用于电镀的晶种层（24）。 通过电镀工艺在籽晶层上形成导电镀层。

公开(公告)号：KR1020030027393A

公开(公告)日：2003-04-07

申请号：KR1020010060579

申请日：2001-09-28

Applicant: 삼성전자주식회사

Inventor： 김광복 ,  하상록 ,  남정림 ,  김경현 ,  조민수

IPC: H01L27/10

Abstract: PURPOSE: A method for fabricating a semiconductor device is provided to minimize a defect caused by a step in a polishing process by forming a conductive layer as a gate electrode and by partially etching the conductive layer in a high-stepped cell region so that the height of the conductive layer is reduced. CONSTITUTION: A gate oxide layer is formed on a semiconductor substrate having a cell region and a peripheral region. Structures whose side surface has a vertical profile are formed on the cell region. A conductive layer is continuously formed on the sidewall and upper surface of the structures, the surface of the cell region and the peripheral region. The first nitride layer pattern(120) is selectively formed only in the peripheral region. The conductive layer formed in the cell region is partially and anisotropically etched to lower the height of the conductive layer in the cell region by using the first nitride layer pattern as a mask. The second nitride layer is continuously formed on the conductive layer in the cell region and on the first nitride layer pattern in the peripheral region. The resultant structure is polished to eliminate the conductive layer formed on the structures in the cell region. The nitride layer left in the cell region and the peripheral region is removed. The conductive layer in the cell region and the peripheral region is patterned to form a gate electrode on both sidewalls of the structures while a gate line is formed in the peripheral region.

Abstract translation: 目的：提供一种用于制造半导体器件的方法，以通过形成导电层作为栅电极并且通过部分地蚀刻高阶阶电池区域中的导电层来最小化由抛光工艺中的步骤引起的缺陷，使得高度 的导电层减少。 构成：在具有单元区域和周边区域的半导体基板上形成栅极氧化层。 在单元区域上形成侧面具有垂直剖面的结构。 在结构的侧壁和上表面，电池区域的表面和周边区域上连续地形成导电层。 第一氮化物层图案（120）仅在周边区域中选择性地形成。 通过使用第一氮化物层图案作为掩模，在单元区域中形成的导电层被部分地和各向异性地蚀刻以降低单元区域中的导电层的高度。 第二氮化物层连续地形成在电池区域的导电层上和周边区域中的第一氮化物层图案上。 对所得到的结构进行抛光以消除在单元区域中形成的结构上的导电层。 残留在单元区域和外围区域中的氮化物层被去除。 在单元区域和外围区域中的导电层被图案化以在结构的两个侧壁上形成栅电极，同时在周边区域中形成栅极线。

公开(公告)号：KR100363092B1

公开(公告)日：2002-12-05

申请号：KR1020000035705

申请日：2000-06-27

Applicant: 삼성전자주식회사

Inventor： 이광욱 ,  박임수 ,  이근택 ,  권영민 ,  하상록

IPC: C11D7/22

Abstract: 강유전체막의 손상층을 제거하기 위한 세정액 및 이를 이용한 세정 방법이 제공된다. 본 발명에 따른 세정액은 불화물, 카르복실기를 포함하는 유기산, 알칼리성 pH 조절제 및 물을 포함한다.

公开(公告)号：KR1020020073036A

公开(公告)日：2002-09-19

申请号：KR1020010013192

申请日：2001-03-14

Applicant: 삼성전자주식회사

Inventor： 김정엽 ,  하상록

IPC: H01L21/304

CPC classification number: H01L21/31053 ,  H01L21/31055

Abstract: PURPOSE: A method for fabricating a semiconductor device is provided to reduce a dishing phenomenon generated from a CMP(Chemical Mechanical Polishing) process without forming a dummy pattern. CONSTITUTION: A conductive layer(22) is formed on a semiconductor substrate(20). The first stopper layer(24) is formed thereon. A plurality of conductive patterns are formed by etching the first stopper layer(24) and the conductive layer(22). An interlayer dielectric(26) is formed on a whole surface of the semiconductor substrate(20). The second stopper layer is formed on the interlayer dielectric(26). A photoresist layer is coated on the second stopper layer. The interlayer dielectric(26) of a cell region is removed and a part of the second stopper layer is polished by performing the first polishing process. The second stopper layer is removed from a peripheral region by performing the second polishing process.

Abstract translation: 目的：提供一种用于制造半导体器件的方法，以减少由CMP（化学机械抛光）工艺产生的凹陷现象而不形成虚拟图案。 构成：在半导体衬底（20）上形成导电层（22）。 第一阻挡层（24）形成在其上。 通过蚀刻第一阻挡层（24）和导电层（22）形成多个导电图案。 在半导体衬底（20）的整个表面上形成层间电介质（26）。 第二阻挡层形成在层间电介质（26）上。 光致抗蚀剂层被涂覆在第二阻挡层上。 去除单元区域的层间电介质（26），并通过执行第一抛光处理来抛光第二阻挡层的一部分。 通过进行第二研磨处理，从周边区域除去第二阻挡层。