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    53.
    发明专利
    未知

    公开(公告)号：IT1241050B

    公开(公告)日：1993-12-29

    申请号：IT660990

    申请日：1990-04-20

    Applicant: CONS RIC MICROELETTRONICA

    Inventor： ZAMBRANO RAFFAELE

    IPC: H01L21/336 ,  H01L21/74 ,  H01L21/8222 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/08 ,  H01L29/78 ,  H01L

    Abstract: The invention relates to a process for forming a buried drain or collector region in monolithic semiconductor devices comprising an integrated control circuit and one or more power transistors with vertical current flow integrated in the same chip. The process allows optimization of the current-carrying capacity and the series drain resistance of the power stage and operating voltage in comparison with known structures by provision of one or more regions of high dopant concentration defined after growth of a first epitaxial layer.

    57.
    发明专利
    未知

    公开(公告)号：DE69330556D1

    公开(公告)日：2001-09-13

    申请号：DE69330556

    申请日：1993-05-13

    Applicant: CONS RIC MICROELETTRONICA

    Inventor： ZAMBRANO RAFFAELE

    IPC: H01L21/822 ,  H01L27/04 ,  H01L27/02

    Abstract: An integrated structure protection circuit suitable for protecting a power device (M) against overvoltages comprises a plurality of serially connected junction diodes (D1-D5), each having a first electrode, represented by a highly doped region (1) of a first conductivity type, and a second electrode represented by a medium doped or low doped region (2) of a second conductivity type. A first diode (D1) of said plurality has its first electrode (1) connected to a gate layer (5) of said power device (M) and its second electrode (2) connected to the second electrode (2) of at least one second diode (D2-D5) of said plurality, and said at least one second diode has its first electrode (1) connected to a drain region of the power device (M). The doping level of the second electrode (2) of the diodes (D1-D5) of said plurality is suitable to achieve sufficiently high breakdown voltage values.

    59.
    发明专利
    未知

    公开(公告)号：DE69327320T2

    公开(公告)日：2000-05-31

    申请号：DE69327320

    申请日：1993-09-30

    Applicant: CONS RIC MICROELETTRONICA

    Inventor： ZAMBRANO RAFFAELE

    IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06 ,  H01L29/78

    Abstract: An integrated structure active clamp for the protection of a power device against overvoltages comprises a plurality of serially connected diodes (D1-D4,SD1-D4,DF1,DF2), each having a first and a second electrodes, obtained in a lightly doped epitaxial layer (2;2,2') of a first conductivity type in which the power device (M) is also obtained; a first diode (D1;SD1) of said plurality of diodes has the first electrode (12,13;31,32) connected to a gate layer (7) of the power device (M) and the second electrode (14,15;35) connected to the second electrode (16,17;21,22;27,52,28) of at least one second diode (D2-D4) of the plurality whose first electrode (18,20,24,29) is connected to a drain region (D) of the power device (M); said first diode (D1;SD1) has its first electrode (12,13;31,32) comprising a heavily doped contact region (12;32) of the first conductivity type included in a lightly doped epitaxial layer region (13;31) of the first conductivity type which is isolated from said lightly doped epitaxial layer (2;2,2') by means of a buried region (14;33) of a second conductivity type and by a heavily doped annular region (15;34) of the second conductivity type extending from a semiconductor top surface to said buried region (14;33).

    60.
    发明专利
    未知

    公开(公告)号：DE69512021T2

    公开(公告)日：2000-05-04

    申请号：DE69512021

    申请日：1995-03-31

    Applicant: CONS RIC MICROELETTRONICA

    Inventor： ZAMBRANO RAFFAELE

    IPC: H01L29/08 ,  H01L29/739 ,  H01L29/78

    Abstract: A DMOS device structure comprises a lightly doped semiconductor layer (1) of a first conductivity type, a plurality of lightly doped semiconductor regions (4,13,18) of a second conductivity type extending from a top surface of the lightly doped semiconductor layer (1) thereinto, source regions (6,16) of the first conductivity type contained in the lightly doped semiconductor regions (4,13,18) and defining channel regions. The lightly doped semiconductor regions (4,13,18) are contained in respective enhancement regions (12,14,19) of the lightly doped semiconductor layer of the same conductivity type as but with a lower resistivity than the lightly doped semiconductor layer (1).

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