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公开(公告)号:GB2496964A
公开(公告)日:2013-05-29
申请号:GB201220281
申请日:2012-11-12
Applicant: IBM
Inventor: HAN SHU-JEN , GUO DECHAO , WONG KEITH KWONG HON , LU YU , CAO QING
Abstract: A fin structure has a length and a width and is located on a substrate 10, the fin structure includes a vertical alternating stack of a first isoelectric point material layer 30 having a first isoelectric point and a second isoelectric material layer 40 having a second isoelectric point less than the first isoelectric point; the first and second isoelectric point material layers become oppositely charged in a solution with a pH between the first and second isoelectric points; carbon nanotubes 50 are given a charge by an ionic surfactant such that they are attracted to one of the first isoelectric point material layer 30 or the second isoelectric point material layer 40 and repelled by the other; the carbon nanotubes 50 will attach to the attractive of the two layers aligning lengthwise along the sidewall of the attractive layers. A method of forming said structure is also disclosed, it further discloses that the fin structure is immersed in a solution containing the carbon nanotubes 50, the solution having a pH between the first and second isoelectric points. The fin structure may then have a gate dielectric 60 and gate electrode 70 selectively deposited thereon, where source and drain electrodes may also be selectively deposited such that the fin structure becomes part of the field effect transistor with the carbon nanotubes 50 acting as the semiconducting channel.
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公开(公告)号:DE112011101215T5
公开(公告)日:2013-02-07
申请号:DE112011101215
申请日:2011-05-18
Applicant: IBM
Inventor: GUO DECHAO , OLDIGES PHILIP , CHEN TZE-CHLANG , WANG YANFENG
Abstract: Eine Gate-Stapel-Struktur für Feldeffekttransistor(FET)-Einheiten umfasst eine stickstoffreiche erste Dielektrikumsschicht, welche über einer Halbleitersubstratfläche ausgebildet ist; eine stickstoffarme sauerstoffreiche zweite Dielektrikumsschicht, welche auf der stickstoffreichen ersten Dielektrikumsschicht ausgebildet ist, wobei die erste und zweite Dielektrikumsschicht in Kombination eine Bischicht-Grenzflächenschicht bilden; eine Dielektrikumsschicht hoher Dielektrizitätskonstante k, welche über der Bischicht-Grenzflächenschicht ausgebildet ist; eine Metall-Gate-Leiterschicht, welche über der Dielektrikumsschicht hoher Dielektrizitätskonstante k ausgebildet ist; und die Austrittsarbeit einstellende Dotierstoffarten, welche in die Dielektrikumsschicht hoher Dielektrizitätskonstante k und in die stickstoffarme sauerstoffreiche zweite Dielektrikumsschicht diffundiert sind, und wobei die stickstoffreiche erste Dielektrikumsschicht dazu dient, die die Austrittsarbeit einstellenden Dotierstoffarten von der Halbleitersubstratfläche fernzuhalten.
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公开(公告)号:GB2492514A
公开(公告)日:2013-01-02
申请号:GB201219007
申请日:2011-03-15
Applicant: IBM
Inventor: GUO DECHAO , HAENSCH WILFRIED E , WANG XINHUI , WONG KEITH KWONG HON
IPC: H01L29/78
Abstract: A method for forming a field effect transistor includes forming a gate stack, a spacer adjacent to opposing sides of the gate stack, a silicide source region and a silicide drain region on opposing sides of the spacer, epitaxially growing silicon on the source region and the drain region; forming a liner layer on the gate stack and the spacer, removing a portion of the liner layer to expose a portion of the hardmask layer, removing the exposed portions of the hardmask layer to expose a silicon layer of the gate stack, removing exposed silicon to expose a portion of a metal layer of the gate stack, the source region, and the drain region; and depositing a conductive material on the metal layer of the gate stack, the silicide source region, and the silicide drain region.
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