公开(公告)号：AU2018208453B2

公开(公告)日：2020-10-22

申请号：AU2018208453

申请日：2018-01-09

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F9/30

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：MX363387B

公开(公告)日：2019-03-20

申请号：MX2014008461

申请日：2012-11-13

Applicant: IBM

Inventor： FARRELL MARK ,  SCHMIDT DONALD WILLIAM ,  GAINEY CHARLES JR ,  KUBALA JEFFREY PAUL ,  PIERCE BERNARD ,  MULDER JAMES ,  ROGERS ROBERT

IPC: G06F9/46 ,  G06F3/00 ,  G06F9/455 ,  G06F9/54

Abstract: Se provee a un programa (por ejemplo, un sistema operativo) una advertencia que tiene un período de gracia en el cual puede efectuar una función, tal como limpieza (por ejemplo, consumar, detener y/o hacer mover una unidad despachable). El programa es advertido, en un ejemplo, que está perdiendo acceso a sus recursos compartidos. Por ejemplo, en un medio ambiente virtual, un programa invitado es advertido que está a punto de perder sus recursos de unidad de procesamiento central y por consiguiente va a efectuar una función, tal como limpieza.

公开(公告)号：HRP20181992T1

公开(公告)日：2019-01-25

申请号：HRP20181992

申请日：2018-11-27

Applicant: IBM

Inventor： GAINEY CHARLES ,  KUBALA JEFFREY PAUL ,  FARRELL MARK ,  SCHMIDT DONALD WILLIAM ,  PIERCE BERNARD ,  ROGERS ROBERT ,  MULDER JAMES

IPC: G06F9/54 ,  G06F9/455 ,  G06F9/48 ,  G06F9/50

公开(公告)号：ZA201703081B

公开(公告)日：2018-11-28

申请号：ZA201703081

申请日：2017-05-04

Applicant: IBM

Inventor： GAINEY CHARLES (DECEASED) ,  LEHNERT FRANK ,  BRADBURY JONATHAN DAVID ,  OSISEK DAMIAN ,  BUSABA FADI YUSUF ,  SLEGEL TIMOTHY ,  GREINER DAN ,  SCHMIDT DONALD WILLIAM ,  KUBALA JEFFREY PAUL ,  HELLER LISA ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  NERZ BERND

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

公开(公告)号：CA3037265A1

公开(公告)日：2018-07-19

申请号：CA3037265

申请日：2018-01-09

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F9/30

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：AU2015238632B2

公开(公告)日：2018-04-26

申请号：AU2015238632

申请日：2015-03-19

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES ,  JACOBI CHRISTIAN

IPC: G06F9/50 ,  G06F9/38

Abstract: Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread, and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. The computer system also includes a multithreading facility configured to control the configuration to perform a method. The method includes executing in the primary thread in the ST mode, an MT mode setting instruction. A number of threads requested is obtained from a location specified by the MT mode setting instruction. Based on determining that the number of threads requested indicates multiple threads, the MT mode is enabled to execute the multiple threads including the primary thread and the one or more secondary threads.

公开(公告)号：AU2015238662A8

公开(公告)日：2018-04-19

申请号：AU2015238662

申请日：2015-03-16

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  BRADBURY JONATHAN DAVID ,  KUBALA JEFFREY PAUL ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  SCHMIDT DONALD WILLIAM ,  GAINEY JR CHARLES

IPC: G06F9/455 ,  G06F9/50

Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.

公开(公告)号：CA2800623C

公开(公告)日：2018-03-06

申请号：CA2800623

申请日：2010-11-08

Applicant: IBM

Inventor： SITTMANN GUSTAV III ,  CRADDOCK DAVID ,  GREGG THOMAS ,  SCHMIDT DONALD WILLIAM ,  BELMAR BRENTON FRANCOIS ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  TARCZA RICHARD ,  EASTON JANET

IPC: G06F9/48

Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.

公开(公告)号：AU2015238662B2

公开(公告)日：2017-12-14

申请号：AU2015238662

申请日：2015-03-16

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  BRADBURY JONATHAN DAVID ,  KUBALA JEFFREY PAUL ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  SCHMIDT DONALD WILLIAM ,  GAINY JR CHARLES

IPC: G06F9/455 ,  G06F9/50

Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.

公开(公告)号：AU2015330266A8

公开(公告)日：2017-03-16

申请号：AU2015330266

申请日：2015-09-14

Applicant: IBM

Inventor： FARRELL MARK ,  HELLER LISA ,  KUBALA JEFFREY PAUL ,  SCHMIDT DONALD WILLIAM ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  OSISEK DAMIAN ,  BRADBURY JONATHAN DAVID ,  LEHNERT FRANK ,  NERZ BERND ,  JACOBI CHRISTIAN ,  GAINEY CHARLES

IPC: G06F9/455 ,  G06F9/48

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.