中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

70 records (took 0.021 seconds)

    51.
    发明专利
    未知

    公开(公告)号：DE69528958T2

    公开(公告)日：2003-09-11

    申请号：DE69528958

    申请日：1995-01-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BRAMBILLA DAVIDE ,  BOTTI EDOARDO ,  FERRARI PAOLO

    IPC: H01L21/8222 ,  H01L27/06 ,  H01L29/861 ,  H01L27/00 ,  H01L27/02

    Abstract: A monolithic output stage which is self-protected against the occurrence of incidental latch-up phenomena and integrated in a portion of a semiconductor material chip which is isolated by a peripheral barrier structure linked electrically to a terminal (Vcc), specifically a supply terminal being applied thereto a constant voltage (+Vcc), has the barrier structure coupled to the terminal (Vcc) through a forward biased diode (D1) from the terminal (Vcc). The integrated barrier structure is formed within a region (21'') having a first type of conductivity, and comprises a heavily doped well (29) having the first type of conductivity and a substantially annular shape and contacting a large surface of the chip (22). This structure is characterized in that, in at least one portion thereof close to contact regions (S) for connection to said terminal (Vcc), the barrier well (29) is split into first and second heavily doped concentrical regions (29' and 29'') having the first type of conductivity. The barrier structure further comprises, located at said portion, an intermediate region (30) which is less heavily doped and also has the first type of conductivity, and a surface region (31) with a second type of conductivity located within said intermediate region. The invention preferably involves a power output stage including a vertical PNP transistor isolated by said barrier well.

    52.
    发明专利
    未知

    公开(公告)号：DE69429660D1

    公开(公告)日：2002-02-21

    申请号：DE69429660

    申请日：1994-10-07

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  MANDRINI TIZIANA

    IPC: H03F1/00 ,  H03F1/02 ,  H03F3/30 ,  H03F3/45 ,  H03F3/68 ,  H03F3/72

    Abstract: Distorting effects and disturbances caused by abrupt voltage changes on the output nodes of a pair of selfconfiguring amplifiers for alternatively driving in a bridge mode or in a single-ended mode by one amplifier of the pair a certain load, in function of the level of the input signal, because of the enabling/disabling of a common mode control loop, are effectively eliminated by storing the voltage of a common mode control node of the pair of amplifiers on a capacitance during a phase of disabling of said common mode control loop. Abrupt voltage drops and recoveries at the switching instants are prevented.

    53.
    发明专利
    未知

    公开(公告)号：ITVA990003A1

    公开(公告)日：2000-07-19

    申请号：ITVA990003

    申请日：1999-01-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  RANIERI DANILO

    IPC: H03F3/21 ,  H03F3/217

    Abstract: A switching output power stage, including a power switching device for the supply line and a complementary power switching device for the ground rail driven in phase opposition by a pulse width modulated (PWM) drive signal, is provided with sensors detecting a substantial turn-off state of each of the two power switching devices and generating a pair of logic signals. A combinatory logic circuit combines the drive signal and the pair of logic signals and generates a pair of driving signals of opposite phase for the respective power switching devices. The switching to a turn-on state of any of the two power devices is enabled upon verifying a substantially attained turn-off state by the device complementary to the device commanded to turn-on, irrespective of the process spread and of changes of temperature load conditions and of configuration of a plurality of output stages of a multichannel amplifier.

    54.
    发明专利
    未知

    公开(公告)号：DE69421692T2

    公开(公告)日：2000-07-06

    申请号：DE69421692

    申请日：1994-05-23

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  CHIOZZI GIORGIO

    IPC: H03F1/34 ,  H03F1/32 ,  H03F3/30 ,  H03F3/45 ,  H03F1/00

    Abstract: An AB class stage is described which comprises two complementary MOSFET final transistors (Qpf, Qnf) connected in a push-pull manner between two supply terminals (+Vcc, -Vcc). In order to attain high linearity, low switching distortion, a high ratio between the maximum output current and the rest current, independence of the rest current from the temperature and manufacturing variables and a circuit simplicity, the circuits determining the rest current and those which provide current to the load are substantially independent of one another. More particularly, two transconductance amplifiers (Tp, Tn) are provided which control the final transistors (Qpf, Qnf) and are dimensioned so as to have zero output current in rest conditions, two voltage generators (Vref(Qpf), Vref(Qnf)) which determine the rest current and two resistors (Rp, Rn) being connected between the gate electrodes of the final transistors and the supply terminals (+Vcc, -Vcc).

    55.
    发明专利
    未知

    公开(公告)号：DE69413235T2

    公开(公告)日：1999-01-28

    申请号：DE69413235

    申请日：1994-10-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  MANDRINI TIOZIANA

    IPC: H03F3/68 ,  H03F3/30 ,  H03F3/45 ,  H03F3/50 ,  H03F3/72

    Abstract: A circuit assembly comprising an operational amplifier having an input stage (20) coupled directly to an output stage (21) in the form of a class AB amplifier is described. A compensating capacitance (Cc) is connected between a first input (IN1) and the output (OUT) of the output stage (21). A conventional feedback system (Rf1, Rf2) is provided between the output (OUT) of the output stage and an input of the input stage (20). Three switches (S1, S2, S3) enable the operational amplifier to be switched into three configurations: one in which it behaves in the manner of a conventional operational amplifier; one in which it behaves in the manner of a buffer; and one in which it has high impedance between its output terminals (OUT, earth). The class AB amplifier is constructed such that its final transistors (Qpf, Qnf) are controlled continuously and such that its polarisation circuits are substantially independent of those which provide current to the load (Zo), such that switching from one configuration to the other occurs without transients being generated.

    56.
    发明专利
    未知

    公开(公告)号：ITVA990003D0

    公开(公告)日：1999-01-19

    申请号：ITVA990003

    申请日：1999-01-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  RANIERI DANILO

    IPC: H03F3/21 ,  H03F3/217

    Abstract: A switching output power stage, including a power switching device for the supply line and a complementary power switching device for the ground rail driven in phase opposition by a pulse width modulated (PWM) drive signal, is provided with sensors detecting a substantial turn-off state of each of the two power switching devices and generating a pair of logic signals. A combinatory logic circuit combines the drive signal and the pair of logic signals and generates a pair of driving signals of opposite phase for the respective power switching devices. The switching to a turn-on state of any of the two power devices is enabled upon verifying a substantially attained turn-off state by the device complementary to the device commanded to turn-on, irrespective of the process spread and of changes of temperature load conditions and of configuration of a plurality of output stages of a multichannel amplifier.

Patent Agency Ranking