Abstract:
리소그라피(lithography) 장치 및 리소그라피 방법에 대해 개시한다. 본 발명의 리소그라피 장치는 기판에 대한 리소그라피 공정을 수행하기 위한 리소그라피 장치에 있어서, 상기 기판의 결정 구조를 분석하기 위한 분석 장치 및 상기 분석된 결정 구조를 기초해서 상기 기판의 위치를 조정하는 수단을 포함하고, 상기 리소그라피 장치는 상기 위치가 조정된 기판에 대하여 리소그라피 공정을 수행하도록 구성된 것을 특징으로 한다.
Abstract:
A resistive random access memory (RRAM) having a solid solution layer and a method of manufacturing the RRAM are provided. The RRAM includes a lower electrode, a solid solution layer on the lower electrode, a resistive layer on the solid solution layer, and an upper electrode on the resistive layer. The method of manufacturing the RRAM includes forming a lower electrode, forming a solid solution layer on the lower electrode, forming a resistive layer on the solid layer and forming an upper electrode on the resistive layer, wherein the RRAM is formed of a transition metal solid solution.
Abstract:
A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
Abstract:
PURPOSE: A graphene electronic device and a manufacturing method thereof are provided to maintain a property of a graphene channel layer without damage by forming gate oxide, in other word, a protective layer on graphene. CONSTITUTION: A graphene channel layer is arranged on the top of a substrate. A source electrode(130) and a drain electrode(140) are formed on both ends of a graphene channel layer(120). A gate oxide(150) is formed between the source electrode and the drain electrode on the graphene channel layer. The gate electrode is arranged on the gate oxide. The gate oxide is formed to be substantially identical to a shape of a channel layer between the source electrode and the drain electrode.
Abstract:
PURPOSE: An oscillator and an operating method thereof are provided to generate high frequency signals without application of external magnetism using phenomenon of a spin transfer torque. CONSTITUTION: The magnetic moment of a magnetic layer(FP1) applies current on an oscillator for precession. The current is applied from the magnetic layer to an anti- ferroelectric material layer(AF1). Electronics are applied from the anti- ferroelectric material layer through a pinned layer(FF1) to a free layer. The electronics passing through the pinned layer and flowing to the magnetic layer has the same spin direction as the pinned layer. The electronics can apply the spin torque on the magnetic layer. The magnetic moment of the magnetic layer can be perturbed by the spin torque.
Abstract:
그라핀 전자소자 및 제조방법이 개시된다. 개시된 그라핀 전자소자는, 상기 기판 상에 형성된 연결배선 및 복수의 전극을 덮는 층간 절연층과, 상기 층간 절연층 상에서 상기 복수의 전극을 덮는 제1절연층과, 상기 제1절연층 상에 형성되며 적어도 두개의 상기 전극과 그 양단이 연결되는 그라핀;을 포함한다.
Abstract:
PURPOSE: A method of fabricating graphene using laser annealing and method of fabricating field effect transistor using the same are provided to form a graphene layer by heating a part of a SiC layer or the whole thereof over 1900k without high temperature interference to a silicon substrate. CONSTITUTION: In a method of fabricating graphene using laser annealing and method of fabricating field effect transistor using the same, a silicon carbide substrate is prepared. The surface of the silicon substrate(20) is processed by laser annealing and a graphene layer(24) is formed on the processed surface of the substrate.
Abstract:
PURPOSE: A magnetic tunnel junction device, a method of manufacturing the same and an electronic device comprising the same are provided to have a high magnetoresistance ratio by maintaining an electronic device having a magnetic tunnel junction device amorphous state in a thermal treatment process. CONSTITUTION: In a magnetic tunnel junction device, a method of manufacturing the same and an electronic device comprising the same, a vertical MTJ(100) comprises a pinned layer(30), a tunneling film(40), and a free layer(50). The pinned layer comprises a plurality of a pair of material layers(30P1~30Pn). The first material layer comprises a first rare-earth transition metal layer(30a) and a second rare-earth transition metal layer(30b) The tunneling film is used for the coherent tunneling of a spin polarization current. The free layer has a vertical magnetic anisotropy.
Abstract:
PURPOSE: A method of fabricating a carbon insulating layer using a molecular beam epitaxy and fabricating a field effect transistor using the same are provided to implement carbon insulating layer and a channel formation layer while keeping the inside of the chamber vacuum. CONSTITUTION: A substrate(120) is mounted in a substrate holder within a molecular beam epitaxy chamber. A carbon source is provided from the first source supply unit into the chamber. A carbon atom layer of a carbon insulating layer(222) formed on the substrate is measured. The second source is supplied from a second source supply unit to form a second layer on the carbon insulating layer. The supply of the second source is interrupted by using the breaker of the second source supply unit.
Abstract:
PURPOSE: An information storage device comprising a magneto-resistive device is provided to increase a read signal. CONSTITUTION: A magnetic track(100) has a magnetic domain wall between a plurality of magnetic domains. A magnetic domain wall moving unit(200) moves the magnetic domain wall. A magneto-resistive device(300) reproduces information which is recorded in the magnetic track. A pinned layer(10) has a fixed magnetization direction. A free layer(20) has a magnetization easy axis between the pinned layer and the magnetic track.