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公开(公告)号：EP1126467B1
公开(公告)日：2009-04-08
申请号：EP00830100.4
申请日：2000-02-14
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi
CPC classification number: H03K23/665 , G11C7/1018 , G11C8/04
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公开(公告)号：EP1199723B1
公开(公告)日：2008-12-31
申请号：EP00830675.5
申请日：2000-10-18
Applicant: STMicroelectronics S.r.l.
Inventor： Tomaiuolo, Francesco , Nicosia, Salvatore , Pascucci, Luigi
CPC classification number: G11C7/1033 , G11C7/1045
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63.发明授权Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor 有权具有的NAND型非易失性存储器Integriete电路
公开(公告)号：EP1713084B1
公开(公告)日：2007-12-12
申请号：EP05425209.3
申请日：2005-04-11
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi , Rolandi, Paolo
IPC: G11C16/16
CPC classification number: G11C16/0483 , G11C16/12
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64.发明公开Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor 有权Integriete Schaltung mitNichtflüchtigemSpeicher des NAND-Typs
公开(公告)号：EP1713084A1
公开(公告)日：2006-10-18
申请号：EP05425209.3
申请日：2005-04-11
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi , Rolandi, Paolo
IPC: G11C16/16
CPC classification number: G11C16/0483 , G11C16/12
Abstract: The invention relates to a non volatile memory electronic device (20) integrated on semiconductor with an architecture comprising at least one memory matrix (21) organised in rows or word lines (WL) and columns or bit lines (BL) of memory cells. The matrix is divided into at least a first (23) and a second memory portions (23a) having different access speed, said first (23) and second memory portions (23a) sharing the structures of the bit lines (BL) which correspond to one another and one by one and are electrically interrupted by controlled switches (29) placed between the first (23) and the second portion (23a).
Abstract translation: 本发明涉及一种集成在半导体上的非易失性存储器电子器件（20），该非易失性存储器电子器件（20）具有包括以行或字线（WL）和存储器单元的列或位线（BL）组织的至少一个存储器矩阵（21）的架构。 矩阵被分成至少具有不同访问速度的第一存储器部分（23）和第二存储器部分（23a），所述第一存储器部分（23）和第二存储器部分（23a）共享位线（BL）的结构， 彼此并且一个接一个地被置于第一（23）和第二部分（23a）之间的受控开关（29）电中断。
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65.发明授权Burst interleaved memory with burst mode access in synchronous read phases wherein the two sub-arrays are independently readable with random access during asynchronous read phases 有权交错突发存储器爆裂同步读周期，其中，所述两个子存储器阵列是在异步读周期独立可读随机存取存取
公开(公告)号：EP1122734B1
公开(公告)日：2005-03-30
申请号：EP00830068.3
申请日：2000-01-31
Applicant: STMicroelectronics S.r.l.
Inventor： Campanale, Fabrizio , Tomaiuolo, Francesco , Nicosia, Salvatore , De Ambroggi, Luca Giuseppe , Kumar, Promod c/o Stars e Strips Tlp , Pascucci, Luigi
IPC: G11C7/00
CPC classification number: G11C7/1057 , G11C7/1018 , G11C7/1039 , G11C7/1042 , G11C7/1045 , G11C7/1051 , G11C7/106 , G11C7/1069 , G11C7/1072 , G11C7/22 , G11C8/04 , G11C8/18
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Patent Agency Ranking66.发明授权Reference word line and data propagation reproduction circuit, particularly for non-volatile memories provided with hierarchical decoders 失效基准字线和数据运行时再现电路，特别是用于非液体存储与分层的解码器
公开(公告)号：EP0798729B1
公开(公告)日：2004-11-03
申请号：EP96830160.6
申请日：1996-03-29
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi , Rolandi, Paolo , Fontana, Marco , Barcella, Antonio
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公开(公告)号：EP0786777B1
公开(公告)日：2004-03-31
申请号：EP96830026.9
申请日：1996-01-24
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi
IPC: G11C16/00
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68.发明授权Circuit for determining completion of pre-charge of a generic bit line, particularly for non-volatile memories 失效电路，用于确定一个通用的位线的满充电，特别是对非易失性存储器
公开(公告)号：EP0801393B1
公开(公告)日：2004-03-10
申请号：EP96830197.8
申请日：1996-04-09
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi
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69.发明授权Memory architecture for flexible reading management, particularly for non-volatile memories, having noise-immunity features, matching device performance, and having optimized throughput 失效存储器架构为软读取的管理，尤其是对于非易失性存储器，具有抗噪声特性，具有固定的功率调整，和具有优化的流量
公开(公告)号：EP0805453B1
公开(公告)日：2004-01-02
申请号：EP96830239.8
申请日：1996-04-29
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi
IPC: G11C7/00
CPC classification number: G11C7/106 , G11C7/1051 , G11C7/1069 , G11C7/22
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70.发明授权Data sensing timing modulating circuit, particularly for non-volatile memories 失效Datenabtastzeitmodulierungsschaltung，特别是对于非易失性存储器
公开(公告)号：EP0798741B1
公开(公告)日：2003-11-12
申请号：EP96830165.5
申请日：1996-03-29
Applicant: STMicroelectronics S.r.l.
Inventor： Pascucci, Luigi
IPC: G11C16/06
CPC classification number: G11C16/32
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