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公开(公告)号：JPH07152584A
公开(公告)日：1995-06-16
申请号：JP22433594
申请日：1994-09-20
Applicant: ADVANCED MICRO DEVICES INC
Abstract: PURPOSE: To provide a computer system provided with a peripheral device capable of asserting interruption request signals and an interruption controller provided with at least one interruption request line suited for reducing power consumption for receiving the interruption request signals. CONSTITUTION: This interruption controller 20 is provided with a control circuit 118 capable of generating microprocessor interruption signals INT in response to the assertion of the interruption request signals IR0 -IR1 and an under- processing register 124 for storing data for displaying whether or not a specified interruption request is under a processing at present by a microprocessor. A power management unit 10 is connected to the output line of the under- processing register 124 and controls clock signals or power supplied to this computer system by the data stored inside the under-processing register 124.
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公开(公告)号：JPH0773687A
公开(公告)日：1995-03-17
申请号：JP13431094
申请日：1994-06-16
Applicant: ADVANCED MICRO DEVICES INC
Inventor： JIEEMUZU YUU , TEIAO FUO KUO
Abstract: PURPOSE: To obtain an output buffer circuit programmable using a standard programmer in a high voltage although it is operated with an applied low voltage. CONSTITUTION: A program verifying logic signal from a programmer is detected with the output buffer circuit 10, and the speed of output driver transistors 12, 14 is reduced with a device speed reducing block 11 when the signal is detected. Whereby, a noise problem due to a higher voltage in programming of an EPROM device is excluded, at the same time, the output buffer circuit 10 is operated at a required performance level during the normal operation.
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公开(公告)号：JPH0773019A
公开(公告)日：1995-03-17
申请号：JP6339191
申请日：1991-03-27
Applicant: ADVANCED MICRO DEVICES INC
Inventor： TOOMASU DABURIYU RINCHI , SUTEIIBUN DEII MAKINTAIA
Abstract: PURPOSE: To obtain a speedy and relatively small high base carry look ahead tree by allowing each of plural tree nodes to include a carry chain or the deformation, and/or an HAND gate chain or the deformation. CONSTITUTION: Three different types of blocks are arrayed in three levels. The first level includes 15 corrected carry chain blocks 74-102, and a carry chain block 104 corrected for carry-in, and block propagation and generation is generated for four input positions. The second level includes four Manchester carry chain nodes 106-112, and the block propagation and generation is generated from the four of the first level. Therefore, the second level provides information related with 4×4 or 16 bit blocks. The third level includes two Manchester carry chain nodes 114 and 116, and provides block information related with the four or 4×(4×4) or 64 hits of the blocks of the second level.
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公开(公告)号：JPH0758557A
公开(公告)日：1995-03-03
申请号：JP14139794
申请日：1994-06-23
Applicant: ADVANCED MICRO DEVICES INC
Inventor： JIEFURII II BUREEMAA
IPC: H03F3/45
Abstract: PURPOSE: To make an operational amplifier operable at a low power supply voltage by making the output of the amplifier swingable substantially over the full voltage range of a power source and, at the same time, to enable the amplifier adaptable to an output range performance request which is seen in the application of a high voltage. CONSTITUTION: An amplifier 4 is designed so that the amplifier 4 may have the minimum voltage drop through p-channel source transistors 120, 124, and 128 and the output 114 of the amplifier 4 may swing over a wide range. Namely, a DC bias circuit works to establish a bias voltage at a transistor 124 in a current source, at transistors 132 and 136 in a current sink, and at transistors 122, 126, 130, 134, and 138 in a cascode device. Therefore, current mirror operations between transistors 128 and 120 and current sink between the transistors 132 and 136 cause each transistor to stay in a saturated area against all swinging values of the output 114.
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公开(公告)号：JPH0738509A
公开(公告)日：1995-02-07
申请号：JP16597291
申请日：1991-07-05
Applicant: ADVANCED MICRO DEVICES INC
Inventor： SAFUDAA EMU ASUGAA , JIYON JII BAATOKOBIAKU
IPC: G06F15/16 , G06F9/38 , G06F15/177 , G06F15/78 , G10L19/00 , G10L19/08 , G11B5/012 , G11B5/55 , G11B5/596 , G11B7/085 , G11B11/105 , G11B19/247 , H04B14/04 , G10L9/14 , G10L9/18
Abstract: PURPOSE: To attain a concentrical digital signal processing algorithm by using a conventionally available component element that operates at a conventional clock speed. CONSTITUTION: A single integrated circuit chip contains a CPU 200 which includes an execution device having an arithmetic and logic unit and an accumulator, a program counter, a memory, a clock generator, a timer, a bus interface, a chip selection/output device and an interrupt processor, a digital signal processor(DSP) 300 which includes an instruction set that executes the digital signal processing algorithm, an execution device that executes the multiplication and accumulation functions and an external interface, and a combination of an address bus 102 connected between the CPU 200 and the DSP 300, a data bus 104 connected between the CPU 200 and the DSP 300 and a static scheduler which statically executes the signal processing algorithm between the CPU 200 and the DSP 300.
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Patent Agency Ranking
公开(公告)号：JPH077997B2
公开(公告)日：1995-01-30
申请号：JP50499587
申请日：1987-08-05
Applicant: ADVANCED MICRO DEVICES INC
Inventor： CHAN SHAROTSUPU JEI , JOHAANSOON JAN
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公开(公告)号：JPH0721797A
公开(公告)日：1995-01-24
申请号：JP11995494
申请日：1994-06-01
Applicant: ADVANCED MICRO DEVICES INC
Inventor： JIEEMUZU YUU , TEIAOOFUO KUO
Abstract: PURPOSE: To correctly operate an associative memory device in both of reading- out and program modes by changing over the first and second bias voltages applied to this device by a selector switch according to the detection results of the first and second source voltages supplied to the device. CONSTITUTION: The respective detecting circuits 48 or 50 and 60 output signals 49, 52, 62 when these circuits detect the source voltages Vcc or Vpp , in both reading-out and programming modes of the EPROM of the associative memory device. The sure and adequate operation of both modes is executed by a latch 14 and the spare columns and rows 30 and 32 of a ROM 18 are exactly addressed by the reset signal 42 outputted from an OR gate 64 by these signals. The switch 58 selects the adequate bias voltage 54 or 56 for both modes to be inputted and outputs the voltages to a UPROM 12 by the signal 52. As a result, the ROM 18 is programmed by the low source voltage, by which power source consumption is reduced. The ROM is operated by the high voltage during the programming. The correct operation is thus executed at multiple power source levels.
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公开(公告)号：JPH0715454A
公开(公告)日：1995-01-17
申请号：JP8119594
申请日：1994-04-20
Applicant: ADVANCED MICRO DEVICES INC
Inventor： NEIDAA BIJIE , UIRIAMU ROO
Abstract: PURPOSE: To provide a system used in a network for certainly preventing the reception of data without any authority and providing safety. CONSTITUTION: This system prevents a port without any authority from receiving certain data by using a jamming sequence. A repeater used in a network is provided with a capability to detect a specific data sequence, and improved characteristics are provided.
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公开(公告)号：JPH06332383A
公开(公告)日：1994-12-02
申请号：JP9091294
申请日：1994-04-28
Applicant: ADVANCED MICRO DEVICES INC
Inventor： REIMONDO ESU DEYUURII , ASHIYUFUAGU AARU KAAN
Abstract: PURPOSE: To provide a power interrupting device for detecting remote operation from a detector/device and generating a signal capable of interrupting power to be applied a load such as an electronic display. CONSTITUTION: The detector 32 can sense remote operation and it is not always necessary to bring operation or a relative object into contact with the detector 32. Depending upon the existence/non-existence of operation, the detector 32 and a related interruption circuit can turn on or turn off a power load device such as an electronic display. The power interrupting device 10 is suitable for turning off the display when a user has left a working area or a room. Although a computer can be continuously operated, the relative display is remotely turned off and the quantity of heat radiated from the display during the period of user's absence can be reduced.
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公开(公告)号：JPH06324775A
公开(公告)日：1994-11-25
申请号：JP2972294
申请日：1994-02-28
Applicant: ADVANCED MICRO DEVICES INC
Inventor： JIERII DEI MOENCHI
IPC: G06F3/00 , G11C7/10 , H03K17/00 , H03K17/693
Abstract: PURPOSE: To exclude contention which possibly occurs among memory cells and to improve the performance of a multiplexer structure by executing compulsory sequential consideration of whether respective wide bus lines are to be connected to a single bus line or not. CONSTITUTION: A circuit 16 contains plural memory cell bits 18. When the left memory cell bit 18 is programmed to be on, a node A20 is dropped to be low, an inverter 22 is set to be high or a path gate 24 is raised to be high and the path gate 24 connects a line X026 to a line YOUT 28. When the node A20 is low, a ground line path gate 30 becomes low and a ground route 32 to the ring part of the circuit 16 is excluded. Thus, a node B34 is set to be high in spite of the programmed state of the right memory cell bit 18. When the node B34 is high, the inverter 36 drops the path gate 38 to be low and cuts the connection of the line X140 and the line YOUT 28.
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