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公开(公告)号：KR1020100018243A
公开(公告)日：2010-02-17
申请号：KR1020080076927
申请日：2008-08-06
Applicant: 삼성전자주식회사
IPC: H04B7/04
CPC classification number: H04B7/0413 , H04B7/0626 , H04L41/5022
Abstract: PURPOSE: A scheduling apparatus for data transmission in a multi-antenna system and a method thereof are provided to assign data with high priority to an MIMO path with a good channel condition to transmit data, thereby removing an RLC(Radio Link Control) reset problem. CONSTITUTION: A state information collecting unit(101) collects condition information during data transmission. A path determining unit(103) checks a channel condition about each MIMO path using the collected condition information. The path determining unit sets a priority of an MIMO path with a good channel condition. A data assigning unit(107) assigns data to a path with the priority.
Abstract translation: 目的：提供一种用于多天线系统中的数据传输的调度装置及其方法，用于向具有良好信道条件的MIMO路径分配高优先级的数据以发送数据，由此去除RLC（无线链路控制）复位问题 。 构成：状态信息收集单元（101）在数据传输期间收集条件信息。 路径确定单元（103）使用所收集的条件信息来检查关于每个MIMO路径的信道条件。 路径确定单元设置具有良好信道条件的MIMO路径的优先级。 数据分配单元（107）将数据分配给具有优先权的路径。
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公开(公告)号：KR100922392B1
公开(公告)日：2009-10-19
申请号：KR1020070043664
申请日：2007-05-04
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
Abstract: 제1 도전체와 제2 도전체 사이에 제공된 가변 저항체를 포함하는 메모리 소자. 상기 가변 저항체와 상기 제1 도전체는 절연막에 한정된 개구부 내에 제공된다. 상기 제1 도전체에 인접한 가변 저항체 부분과 상기 가변 저항체에 인접한 제1 도전체 부분은 실질적으로 동일한 형태를 가지며 그 두께는 상기 개구부의 폭보다 작다.
상변화 물질, 상변화 메모리-
公开(公告)号：KR1020090036771A
公开(公告)日：2009-04-15
申请号：KR1020070102006
申请日：2007-10-10
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/06 , C23C16/305 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: A manufacturing method of a phase change memory device is provided to have a large difference of a resistance value between phase change patterns of a reset state and phase change patterns of a set state by forming a phase change material film inside a localized structure such as a contact hole without a void. A substrate having an opening part is loaded in a chamber. A first source gas is supplied to the chamber during t1 time(t1). The first source gas is changed into a plasma state in order to form a Ge film by supplying plasma to the chamber. A second source gas is supplied to the chamber during t3 time(t3). A second material film is formed on a top of a doped Ge film. The second source gas is changed into a plasma state by supplying plasma to the chamber. A plasma doping process of dopant is performed during t4 time(t4) shorter than t3 time. A third source gas is supplied to the chamber during t5 time(t5). A third material film is formed on a top of a doped tellurium film. The third source gas is changed into a plasma state by supplying plasma to the chamber.
Abstract translation: 提供了一种相变存储器件的制造方法，其特征在于，在复位状态的相变图案和设定状态的相变图案之间，通过在诸如 接触孔没有空隙。 将具有开口部的基板装载在室内。 在t1时间（t1）期间，将第一源气体供应到腔室。 第一源气体变为等离子体状态，以通过向腔室供应等离子体而形成Ge膜。 在t3时间（t3）期间，将第二源气体供应到腔室。 在掺杂的Ge膜的顶部上形成第二材料膜。 通过向室提供等离子体，将第二源气体改变为等离子体状态。 在比t3时间短的t4时间（t4）期间执行掺杂剂的等离子体掺杂过程。 在t5时间（t5）期间，第三源气体被供应到腔室。 在掺杂的碲膜的顶部上形成第三材料膜。 通过向室提供等离子体，第三源气体变为等离子体状态。
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公开(公告)号：KR1020090029488A
公开(公告)日：2009-03-23
申请号：KR1020070094777
申请日：2007-09-18
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: H01L27/2436 , C23C16/305 , C23C16/45531 , C23C16/45553 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/144 , H01L45/1616 , H01L45/1683 , H01L45/1691 , H01L45/143
Abstract: A method of forming a chalcogenide layer including Te, and a method of fabricating a phase-change memory device are provided to improve the electrical characteristic of the phase change memory device by using the phase change material layer which fills up the via hole to be conformal. A method of forming a chalcogenide layer including Te comprises the step of radicalizing the source which contains Te; the step of forming the chalcogenide layer(150) on a substrate(100). The source becomes radical before being injected into the reaction chamber. The chalcogenide layer is formed on the top of the substrate by injecting the source into the reaction chamber. The chalcogenide layer is formed at the temperature of deposition between 200 and 300°C.
Abstract translation: 提供了形成包括Te的硫属化物层的方法以及制造相变存储器件的方法，以通过使用将通孔填充为保形的相变材料层来改善相变存储器件的电特性 。 形成包含Te的硫族化物层的方法包括使含有Te的源激化化的步骤; 在衬底（100）上形成硫族化物层（150）的步骤。 在注入反应室之前，该源变成自由基。 通过将源注入反应室中，在衬底的顶部上形成硫族化物层。 在200和300℃之间的沉积温度下形成硫族化物层。
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公开(公告)号：KR100829602B1
公开(公告)日：2008-05-14
申请号：KR1020060102415
申请日：2006-10-20
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L27/2436 , C23C16/305 , C23C16/45525 , C23C16/45538 , C23C16/45553 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1616 , H01L45/1675
Abstract: 상변화 물질층 형성 방법 및 이를 이용한 상변화 메모리 장치의 제조 방법이 개시된다. 제1 플라즈마가 형성된 챔버 내에서 제1 전구체, 제2 전구체 및 제3 전구체를 이용한 싸이클릭 화학기상증착 공정을 수행하여 상기 기판 상에 제1 크기의 그레인을 갖는 하부 상변화 물질막을 형성한다. 이어서, 상기 제2 플라즈마가 형성된 챔버 내에서 제1 전구체, 제2 전구체 및 제3 전구체를 이용한 싸이클릭 화학기상증착 공정을 수행하여 상기 기판 상에 제1 크기보다 작은 제2 크기의 그레인을 갖는 상부 상변화 물질막을 형성한다. 그 결과 기판 상에는 하부 상변화 물질막이 적층된 구조를 갖고, 하부막과 우수한 접합특성을 가지면서 우수한 전기적 특성을 갖는 상변화 물질층을 형성할 수 있다.
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Patent Agency Ranking
公开(公告)号：KR100780865B1
公开(公告)日：2007-11-30
申请号：KR1020060067514
申请日：2006-07-19
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: C23C16/30 , C23C16/305 , C23C16/45531 , C23C16/45553 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1616 , H01L45/1683
Abstract: A method for forming a semiconductor device including a phase change layer is provided to minimize the volatile characteristic of the phase change layer and to implement a continuous and uniform phase change layer by using germanium source gas as a process gas. A semiconductor substrate having an underlying conductive pattern is loaded into a process chamber(S200). Various source gases are injected into the process chamber to deposit a phase change layer(S210). After depositing the phase change layer, reactive byproducts in the process chamber are exhausted(S220). A process gas used in the forming of the phase change layer includes germanium source gas. The germanium source gas includes one selected from -N=C=O, -N=C=S, -N=C=Se, -N=C=Te, -N=C=Po, and -C N. The germanium source gas has a chemical formula of X^1X^2X^3GeY, wherein X^1, X^2, and X^3 are one selected from a saturated alkyl group, an olefinic alkyl group, acetylenic alkyl group, an allenic alkyl group, -NR^1R^2, -N3, -N=C=O, -N=C=S, -N=C=Se, -N=C=Te, -N=C=Po, and -C N, or a combination thereof, and Y is selected from -N=C=O, -N=C=S, -N=C=Se, -N=C=Te, -N=C=Po, and -C N.
Abstract translation: 提供了一种用于形成包括相变层的半导体器件的方法，以使相变层的挥发性特性最小化，并且通过使用锗源气体作为工艺气体实现连续均匀的相变层。 具有下面的导电图案的半导体衬底被加载到处理室（S200）中。 将各种源气体注入到处理室中以沉积相变层（S210）。 沉积相变层后，处理室中的反应性副产物被耗尽（S220）。 用于形成相变层的工艺气体包括锗源气体。 锗源气体包括选自-N = C = O，-N = C = S，-N = C = Se，-N = C = Te，-N = C = Po和-CN中的一种。 源气体具有X 1，X 2 X 3 3GeY的化学式，其中X 1，X 2和X 3是选自饱和烷基，烯属烷基，炔基烷基，富烯基烷基 ，-NR 1，R 2，-N 3，-N = C = O，-N = C = S，-N = C = Se，-N = C = Te，-N = C = Po和-CN， Y = C = S，-N = C = Se，-N = C = Te，-N = C = Po和-CN。
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公开(公告)号：KR1020070088188A
公开(公告)日：2007-08-29
申请号：KR1020060018476
申请日：2006-02-24
Applicant: 삼성전자주식회사
Abstract: A method and an apparatus for setting system time in a mobile communication system are provided to facilitate implementation in software by performing only simple operations such as storage and comparison to detect a preamble generated in hardware. A method for setting system time in a mobile communication system includes the steps of: receiving a control packet signal from a base station and detecting a preamble(605); storing position information of the detected preamble and outputting information of the preamble by checking whether the preamble is correct based on the position information of the stored preamble(609); and determining whether the outputted preamble information is used according to an initial synchronization acquisition(611).
Abstract translation: 提供了一种用于在移动通信系统中设置系统时间的方法和装置，以通过仅执行诸如存储和比较的简单操作来检测在硬件中产生的前导码来促进软件中的实现。 一种用于在移动通信系统中设置系统时间的方法包括以下步骤：从基站接收控制分组信号并检测前导码（605）; 通过基于所存储的前同步码的位置信息（609）来检查前导码是否正确，存储检测到的前导码的位置信息和输出前导码的信息; 以及根据初始同步获取确定所输出的前同步信息是否被使用（611）。
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公开(公告)号：KR1020070073390A
公开(公告)日：2007-07-10
申请号：KR1020060001224
申请日：2006-01-05
Applicant: 삼성전자주식회사
IPC: H01L21/205
CPC classification number: C23C16/4401 , C23C16/45565 , C23C16/45574 , H01L21/67017
Abstract: An apparatus for manufacturing a semiconductor device is provided to prevent particles generation by supplying purge gas at uniform pressure through a shower head of a reaction chamber. A reaction chamber(110) provides a sealed space in order to form a thin film on a semiconductor substrate by using reaction gas. A gas source(120) generates a first gas and a second gas to be supplied to the inside of the reaction chamber. A first and second supply lines(130,140) are used for supplying transferring the first and second gases. A dummy line(150) is branched from the first gas supply line and is connected to the second gas supply line. A valve(160,170) is formed at the second gas supply line connected to the dummy line in order to supply the second gas through the dummy line and the first gas supply line to the inside of the reaction chamber when the first gas is not supplied to the first and second supply lines.
Abstract translation: 提供了一种用于制造半导体器件的装置，以通过在反应室的淋浴头中以均匀的压力供应吹扫气体来防止产生颗粒。 反应室（110）提供密封空间，以便通过使用反应气体在半导体衬底上形成薄膜。 气源（120）产生要供应到反应室内部的第一气体和第二气体。 第一和第二供应管线（130,140）用于供应转移第一和第二气体。 虚线（150）从第一气体供应管线分支并连接到第二气体供应管线。 在连接到虚拟管线的第二气体供应管线处形成阀门（160,170），以便当第一气体不被供应到第二气体时，将第二气体通过虚拟管线和第一气体供应管线供应到反应室的内部 第一和第二供应线。
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公开(公告)号：KR100687051B1
公开(公告)日：2007-02-26
申请号：KR1020060014639
申请日：2006-02-15
Applicant: 삼성전자주식회사
IPC: H01L27/105
Abstract: A stack-type ferroelectric memory device, its fabricating method, a ferroelectric memory circuit and a method of driving the circuit are provided to rapidly read data without rupturing the data and selectively read and write the data at a wanted address. A selection transistor has a first gate structure(108) and first and second impurity regions(112,114). A first interlayer dielectric(116) covers the selection transistors, and bit line structures electrically connect the selection transistors with the first impurity regions. A second interlayer dielectric(124) covers the bit line structures, and single crystal silicon plugs(128) penetrate the first and the second interlayer dielectrics. Single crystal silicon patterns(130) are positioned on the single crystal silicon plugs and the second interlayer dielectrics. Ferroelectric transistors have a second gate structure and third and fourth impurity regions(142,144).
Abstract translation: 提供一种堆叠型铁电存储器件，其制造方法，铁电存储器电路以及驱动该电路的方法，以快速读取数据而不破坏数据，并选择性地读取和写入所需地址处的数据。 选择晶体管具有第一栅极结构（108）以及第一和第二杂质区（112,114）。 第一层间电介质（116）覆盖选择晶体管，并且位线结构将选择晶体管与第一杂质区域电连接。 第二层间电介质（124）覆盖位线结构，并且单晶硅塞（128）穿透第一层间电介质和第二层间电介质。 单晶硅图案（130）位于单晶硅插塞和第二层间电介质上。 铁电晶体管具有第二栅极结构以及第三和第四杂质区（142,144）。
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公开(公告)号：KR1020060119042A
公开(公告)日：2006-11-24
申请号：KR1020050041568
申请日：2005-05-18
Applicant: 삼성전자주식회사
IPC: H01L27/105 , H01L21/304
CPC classification number: H01L27/11507 , G11C11/22 , H01L27/11502 , H01L28/55 , H01L28/75
Abstract: A method for fabricating a ferroelectric layer and a method for manufacturing a semiconductor device using the same are provided to realize a thin ferroelectric layer and to improve degradation thereof by employing a CMP process for polishing a surface of a preliminary ferroelectric layer. A preliminary ferroelectric layer is formed on a substrate(100). The preliminary ferroelectric layer has a thickness of 500 to 1500Š. The preliminary ferroelectric layer is selected from a group consisting of PZT[Pb(Zr,Ti)O3], SBT(SrBi2Ta2O9), BLT[Bi(La,Ti)O3], PLZT[Pb(La,Zr)TiO3], and BST[Bi(Sr,Ti)O 3]. A surface of the preliminary ferroelectric layer is polished to form a ferroelectric layer(115) on the substrate. The ferroelectric layer is cured. The ferroelectric layer has a thickness of 200 to 1000 Š.
Abstract translation: 提供一种制造铁电体层的方法以及使用该方法制造半导体器件的方法，以实现薄铁电体层并通过采用用于抛光预备铁电层的表面的CMP工艺来改善其劣化。 在基板（100）上形成初步铁电层。 初步铁电层的厚度为500〜1500μs。 初步铁电层选自PZT [Pb（Zr，Ti）O3]，SBT（SrBi2Ta2O9），BLT [Bi（La，Ti）O3]，PLZT [Pb（La，Zr）TiO3]和 BST [Bi（Sr，Ti）O 3]。 对初级强电介质层的表面进行研磨，在基板上形成铁电体层（115）。 铁电层被固化。 铁电层的厚度为200〜1000Š。
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