公开(公告)号：KR100468847B1

公开(公告)日：2005-01-29

申请号：KR1020020018026

申请日：2002-04-02

Applicant: 삼성전자주식회사

Inventor： 민요셉 ,  조영진 ,  이정현

IPC: C23C16/448

CPC classification number: C23C16/40 ,  C23C16/45553

Abstract: Provided is a method for fabricating a metal oxide thin film in which a metal oxide generated by a chemical reaction between a first reactant and a second reactant is deposited on the surface of a substrate as a thin film. The method involves introducing a first reactant containing a metal-organic compound into a reaction chamber including a substrate; and introducing a second reactant containing alcohol. Direct oxidation of a substrate or a deposition surface is suppressed by a reactant gas during the deposition process, as it uses alcohol vapor including no radical oxygen as a reactant gas for the deposition of a thin film. Also, since the thin film is deposited by the thermal decomposition, which is caused by the chemical reaction between the alcohol vapor and a precursor, the deposition rate is fast. Particularly, the deposition rate is also fast when a metal-organic complex with beta-diketone ligands is used as a precursor. Further, a thin film with low leakage current can be obtained as the metal oxide thin film fabrication method using a chemical vapor deposition or atomic layer deposition method grows a thin film with fine microstructure.

Abstract translation: 提供一种制造金属氧化物薄膜的方法，其中通过第一反应物和第二反应物之间的化学反应产生的金属氧化物作为薄膜沉积在基底的表面上。 该方法包括将含有金属有机化合物的第一反应物引入包括基材的反应室中; 并引入含醇的第二反应物。 在沉积过程中，基板或沉积表面的直接氧化被反应气体抑制，因为其使用不包含自由基氧的醇蒸气作为用于沉积薄膜的反应气体。 而且，由于醇蒸气与前驱体之间的化学反应导致的热分解而使薄膜沉积，所以沉积速度快。 特别是，当使用具有β-二酮配体的金属 - 有机配合物作为前体时，沉积速率也很快。 此外，由于使用化学气相沉积或原子层沉积法的金属氧化物薄膜制造方法生长具有精细微结构的薄膜，因此可以获得具有低漏电流的薄膜。

公开(公告)号：KR100468162B1

公开(公告)日：2005-01-26

申请号：KR1020010048227

申请日：2001-08-10

Applicant: 삼성전자주식회사

Inventor： 이정현 ,  고석준 ,  김판수 ,  최형진

IPC: G11B20/18

CPC classification number: G11B20/10203 ,  G11B20/10037 ,  G11B20/10222 ,  H04L7/0334 ,  H04L25/069

Abstract: An asymmetric error correction apparatus and method, and clock recovering apparatus and data recovering apparatus for a system for reading data from an optical recording medium such as a CD or DVD that has a multi-level input signal and irregular characteristic of zero-crossing transition. The signal inputted from the optical recording medium is digitized, and a zero-crossing detector extracts four sequential samples and detects a zero-crossing point from the two intermediate samples. An asymmetric error detector judges an asymmetric state and asymmetric polarity of the digital signal from a sum of the two side samples among the four samples if the zero-crossing point is detected. A correction section accumulates the judged asymmetric polarities, judges an asymmetric error of the digital signal if the accumulated value exceeds a predetermined threshold, and corrects the asymmetric error of the read signal caused by an inaccurate pit length.

Abstract translation: 一种非对称纠错装置和方法以及用于从具有多级输入信号和过零转换不规则特性的CD或DVD等光记录介质读取数据的系统的时钟恢复装置和数据恢复装置。 将从光学记录介质输入的信号数字化，并且零交叉检测器提取四个连续采样并从两个中间采样中检测零交叉点。 如果检测到过零点，则非对称误差检测器从四个样本中的两个侧采样的总和中判断数字信号的不对称状态和不对称极性。 校正部分累加所判断的不对称极性，如果累加值超过预定阈值，则判断数字信号的非对称误差，并且校正由不精确的凹坑长度引起的读取信号的非对称误差。

公开(公告)号：KR1020050005726A

公开(公告)日：2005-01-14

申请号：KR1020030098232

申请日：2003-12-27

Applicant: 삼성전자주식회사

Inventor： 김경석 ,  박홍배 ,  김봉현 ,  김성태 ,  권종완 ,  이정현 ,  김기철 ,  임재순 ,  남갑진 ,  김영선

IPC: H01L21/205

CPC classification number: H01L21/0228 ,  C23C16/308 ,  C23C16/45531 ,  C23C16/56 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02205 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/3143 ,  H01L21/31645

Abstract: PURPOSE: A method of forming a high dielectric layer using an atomic layer deposition method and a method of manufacturing a capacitor having the high dielectric layer are provided to improve leakage current characteristics by reducing defects in the high dielectric layer. CONSTITUTION: A precursor including metal elements is supplied and a purging process is performed. An oxidizing agent is supplied and a purging process is performed. A reaction source including a nitrogen element is supplied and a purging process is performed. The precursor including metal elements is formed with an Hf precursor and a high dielectric layer is formed with an HfON layer.

Abstract translation: 目的：提供使用原子层沉积法形成高介电层的方法和制造具有高介电层的电容器的方法，以通过减少高介电层中的缺陷来改善泄漏电流特性。 构成：提供包含金属元素的前体并进行清洗处理。 供给氧化剂，进行清洗处理。 供给包括氮元素的反应源，进行清洗处理。 包含金属元素的前体由Hf前体形成，并且用HfON层形成高介电层。

公开(公告)号：KR1020040093606A

公开(公告)日：2004-11-06

申请号：KR1020030027543

申请日：2003-04-30

Applicant: 삼성전자주식회사

Inventor： 채수두 ,  김정우 ,  이정현 ,  김문경 ,  황현상

IPC: H01L21/8247

CPC classification number: H01L29/792 ,  H01L21/28194 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66833

Abstract: PURPOSE: A non-volatile semiconductor memory device is provided to control effectively trap density according to doping concentration and to improve operation speed by forming an OHA(Oxide-Hafnium oxide Aluminium oxide) layer in a gate stack structure. CONSTITUTION: A semiconductor substrate(40) includes a source(S) and a drain(D) spaced apart from each other. A gate stack structure for contacting the source and drain is formed on the semiconductor substrate. The gate stack structure is composed of a tunneling layer(42), the first trap material layer(44), the first insulating layer(46) and a gate electrode(48). The first trap material layer and the first insulating layer have larger permittivity than a nitride layer. The first oxide layer is formed between the tunneling layer and the first trap material layer. The second oxide layer is formed between the first trap material layer and the first insulating layer. The first oxide layer is made of Al2O3. The first insulating layer is made of one selected from a group consisting of HfO2, ZrO2, Ta2O5, and TiO2.

Abstract translation: 目的：提供一种非易失性半导体存储器件，用于根据掺杂浓度有效地控制阱密度，并通过在栅极堆叠结构中形成OHA（氧化物 - 氧化铪氧化铝）层来提高操作速度。 构成：半导体衬底（40）包括彼此间隔开的源极（S）和漏极（D）。 用于接触源极和漏极的栅极堆叠结构形成在半导体衬底上。 栅极堆叠结构由隧道层（42），第一陷阱材料层（44），第一绝缘层（46）和栅电极（48）组成。 第一陷阱材料层和第一绝缘层具有比氮化物层更大的介电常数。 第一氧化物层形成在隧道层和第一捕集材料层之间。 第二氧化物层形成在第一捕集材料层和第一绝缘层之间。 第一氧化物层由Al2O3制成。 第一绝缘层由选自HfO 2，ZrO 2，Ta 2 O 5和TiO 2的一种制成。

公开(公告)号：KR100455287B1

公开(公告)日：2004-11-06

申请号：KR1020020010982

申请日：2002-02-28

Applicant: 삼성전자주식회사

Inventor： 이정현 ,  민요셉 ,  조영진

IPC: H01L27/04

CPC classification number: H01L28/56 ,  H01L21/3141 ,  H01L21/321 ,  H01L27/0629 ,  H01L28/55 ,  H01L28/65

Abstract: A capacitor for use in a semiconductor device, a method of fabricating the capacitor, and an electronic device adopting the capacitor are provided. The capacitor includes upper and lower electrodes, each formed of a platinum group metal; a thin dielectric layer disposed between the upper and lower electrodes; and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13.

Abstract translation: 提供了用于半导体器件的电容器，制造该电容器的方法以及采用该电容器的电子器件。 电容器包括上部电极和下部电极，每个电极由铂族金属形成; 设置在上电极和下电极之间的薄电介质层; 以及设置在所述下电极和所述薄介电层之间的缓冲层，所述缓冲层包括第3,4或13族的金属氧化物。

公开(公告)号：KR1020040091941A

公开(公告)日：2004-11-03

申请号：KR1020030025716

申请日：2003-04-23

Applicant: 삼성전자주식회사

Inventor： 박상진 ,  김태완 ,  이정현 ,  박완준 ,  송이헌

IPC: G11C11/15

CPC classification number: B82Y25/00 ,  B82Y10/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/3254 ,  H01F41/307 ,  H01L27/228

Abstract: PURPOSE: A magnetic RAM comprising a middle oxide formed in a heterojunction method and its fabrication method are provided to prevent MR(Magnetic Ratio) from being reduced according to the damage of a bottom film quality of a tunneling oxide film of a MTJ layer. CONSTITUTION: An active region(AA) and a field area(FA) are set on a semiconductor substrate(40). An oxide(42) for isolation is formed on the field area. A gate stacked material(44) including a gate electrode is formed on the active area. A source(46) and a drain(48) are formed on the active region on both sides of the gate stacked material. Thus, a transistor is formed on the semiconductor substrate. The transistor is turned on when data is recording on a MTJ layer(62), and is turned off when data is read from the MTJ layer.

Abstract translation: 目的：提供一种包含以异质结方式形成的中间氧化物的磁性RAM及其制造方法，以根据MTJ层的隧道氧化膜的底部膜质量的损坏来防止MR（磁性比）的降低。 构成：在半导体衬底（40）上设置有源区（AA）和场区（FA）。 在场区域上形成用于隔离的氧化物（42）。 在有源区域上形成包括栅电极的栅叠层材料（44）。 源极（46）和漏极（48）形成在栅极叠层材料两侧的有源区上。 因此，在半导体衬底上形成晶体管。 当数据在MTJ层（62）上记录时，晶体管导通，当从MTJ层读取数据时，晶体管被接通。

公开(公告)号：KR1020040081272A

公开(公告)日：2004-09-21

申请号：KR1020030016025

申请日：2003-03-14

Applicant: 삼성전자주식회사

Inventor： 이재욱 ,  이정현

IPC: H03L7/091

CPC classification number: H03L7/091 ,  H03M13/00

Abstract: PURPOSE: A frequency error detector using histogram information of an input signal and a detecting method thereof are provided to detect a frequency error by using a synchronous signal and a period signal of data information. CONSTITUTION: An A/D converter(100) is used for converting an analog signal to a digital signal. A zero crossing point detector(110) is used for detecting a zero crossing point by detecting a code change of the digital signal. A period information detector(120) is used for detecting period information corresponding to a period signal. A histogram information production unit(140) produces error detection target histogram information by using the period information. A frequency error calculator(150) is used for calculating a frequency error by using a difference value between the error detection target histogram information and the reference histogram information.

Abstract translation: 目的：提供使用输入信号的直方图信息的频率误差检测器及其检测方法，以通过使用同步信号和数据信息的周期信号来检测频率误差。 构成：A / D转换器（100）用于将模拟信号转换为数字信号。 零交叉点检测器（110）用于通过检测数字信号的代码变化来检测过零点。 周期信息检测器（120）用于检测与周期信号对应的周期信息。 直方图信息生成单元（140）通过使用周期信息来生成错误检测对象直方图信息。 频率误差计算器（150）用于通过使用误差检测目标直方图信息和参考直方图信息之间的差值来计算频率误差。

公开(公告)号：KR1020040080291A

公开(公告)日：2004-09-18

申请号：KR1020030015197

申请日：2003-03-11

Applicant: 삼성전자주식회사

Inventor： 이정현 ,  서범석 ,  민요셉 ,  조영진

IPC: H01L21/31

CPC classification number: H01L21/0228 ,  C23C16/40 ,  C23C16/45525 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02205 ,  H01L21/02304 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/31645

Abstract: PURPOSE: A method for forming an oxide film having high dielectric constant, a capacitor comprising dielectric film formed by the method and a method for manufacturing the same are provided to reduce the number of ALD apparatuses by using chemical reaction between precursors of aluminum and hafnium. CONSTITUTION: A semiconductor substrate(40) is loaded into an ALD apparatus. A reactant is deposited on an upper surface of the semiconductor substrate. The reactant includes the first reacting element and the second reacting element. The first high dielectric oxide layer(50a) including the first and the second reacting elements is formed on the upper surface of the semiconductor substrate by oxidizing the first and the second reacting elements.

Abstract translation: 目的：提供一种形成具有高介电常数的氧化膜的方法，包括通过该方法形成的电介质膜的电容器及其制造方法，用于通过使用铝和铪的前体之间的化学反应来减少ALD装置的数量。 构成：将半导体衬底（40）装载到ALD装置中。 反应物沉积在半导体衬底的上表面上。 反应物包括第一反应元件和第二反应元件。 通过氧化第一和第二反应元件，在半导体衬底的上表面上形成包括第一和第二反应元件的第一高电介质氧化物层（50a）。

公开(公告)号：KR200339959Y1

公开(公告)日：2004-03-26

申请号：KR2019980007951

申请日：1998-05-14

Applicant: 삼성전자주식회사

Inventor： 이정현

IPC: G06F3/153

Abstract: 본 고안은 모니터에 설치되는 액정패널 조립체에 관한 것이다. 본 고안에 따른 모니터용 액정패널 조립체는, 지지브라켓의 스터드에 삽입부가 형성되어 있으며, 액정패널과 지지브라켓과의 결합을 위하여 액정패널이 스터드에 놓여질 때 그 스터드의 삽입부가 액정패널의 관통부에 삽입되어 액정패널의 위치를 결정하도록 구성되어 있으므로, 액정패널과 지지브라켓의 결합작업이 용이하고 정확하게 행해질 수 있다.

公开(公告)号：KR100408276B1

公开(公告)日：2003-12-01

申请号：KR1020000082976

申请日：2000-12-27

Applicant: 삼성전자주식회사

Inventor： 정성천 ,  이정현 ,  이용국 ,  장광균

IPC: B41J2/045

Abstract: PURPOSE: A piezo-electric transducer driver circuit is provided to reduce load of micro controller by using a direct memory access system, while reducing dormancy period in printing. CONSTITUTION: A piezo-electric transducer driver circuit comprises an MPU(10) of a micro controller for controlling overall operation; a memory(12) of SRAM type for storage of sampling data of driving waveform; a flip-flop(F1) and a DAC(13) for transmitting and receiving sampling data of driving waveform to and from the memory, and generating an analog waveform; an LPF(14) for removing high frequency quantizing noise from the analog output waveform of the DAC; and an address generator for generating addresses of the memory in a repeated and sequential manner during the cycle of the driving waveform so as to utilize a direct memory access system. The address generator includes an oscillator(11) for generating a specific frequency; a counter(A1) for counting, through an external trigger, the frequency generated from the oscillator; and a comparator(C1) for comparing the signal output from the counter and the address output from the MPU, and providing the result of the comparison as a driving signal for the flip-flop.

Abstract translation: 目的：提供一个压电式传感器驱动电路，通过使用直接存储器访问系统来减少微控制器的负载，同时减少打印时的休眠时间。 构成：压电换能器驱动电路包括用于控制整体操作的微控制器的MPU（10） SRAM类型的存储器（12），用于存储驱动波形的采样数据; 用于将驱动波形的采样数据发送到存储器或从存储器接收驱动波形的采样数据并产生模拟波形的触发器（F1）和DAC（13） 一个LPF（14），用于从DAC的模拟输出波形中去除高频量化噪声; 以及地址生成器，用于在驱动波形的周期期间以重复且顺序的方式生成存储器的地址，以利用直接存储器访问系统。 地址生成器包括用于生成特定频率的振荡器（11） 计数器（A1），用于通过外部触发器对从振荡器产生的频率进行计数; 和一个比较器（C1），用于比较从计数器输出的信号和从MPU输出的地址，并提供比较结果作为触发器的驱动信号。