公开(公告)号：DE102007018914A1

公开(公告)日：2008-10-23

申请号：DE102007018914

申请日：2007-04-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  MAHLER JOACHIM

IPC: H01L25/07 ,  H01L21/50 ,  H01L21/78 ,  H01L23/48 ,  H01L25/065 ,  H01L25/16 ,  H01L25/18

Abstract: A semiconductor device includes a semiconductor chip stack having at least one lower semiconductor chip as a base of the semiconductor chip stack, and at least one upper semiconductor chip. An insulating intermediate plate is arranged between the semiconductor chips. Connecting elements wire the semiconductor chips, the intermediate plate and external terminals to one another.

公开(公告)号：DE102006044691A1

公开(公告)日：2008-03-27

申请号：DE102006044691

申请日：2006-09-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  STECHER MATTHIAS

IPC: H01L23/50 ,  H01L23/482

Abstract: An electronic device and method for production is disclosed. One embodiment provides an integrated component having a first layer which is composed of copper or a copper alloy or which contains copper or a copper alloy, and having an electrically conductive second layer, whose material differs from the material of the first layer, and a connection apparatus which is arranged on the first layer and on the second layer.

公开(公告)号：DE102006038875A1

公开(公告)日：2008-02-21

申请号：DE102006038875

申请日：2006-08-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  WOWRA THOMAS

IPC: H01L21/60 ,  H01L23/49

Abstract: The method involves fastening a semiconductor unit i.e. semiconductor chip (5), to a carrier (7) by soldering or gluing. A wire bond connection is provided between the semiconductor unit and the carrier by applying a conductive embossed contact sill (11) on the carrier. A wire bond contact is performed between the contact sill and a bond pad (6a) on the semiconductor unit. A metal body is connected by an arc generated by an electric current.

公开(公告)号：DE102005027356B4

公开(公告)日：2007-11-22

申请号：DE102005027356

申请日：2005-06-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  KOENIGSBERGER ALEXANDER ,  OTREMBA RALF ,  MAHLER JOACHIM ,  SCHLOEGEL XAVER ,  SCHIESS KLAUS

IPC: H01L25/07 ,  H01L21/50

Abstract: A power semiconductor component stack, using lead technology with surface-mountable external contacts, includes at least two MOSFET power semiconductor components each having a top side and an underside. The underside includes: a drain external contact area, a source external contact area and a gate external contact area. The top side includes at least one source external contact area and a gate external contact area. The gate external contact areas on the top side and the underside are electrically connected to one another. The power semiconductor component stack is a series circuit or a parallel circuit of MOSFET power semiconductor components arranged one above another in a plastic housing composition.

公开(公告)号：DE102004058878A1

公开(公告)日：2006-06-14

申请号：DE102004058878

申请日：2004-12-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  GALESIC IVAN ,  ROESL KONRAD ,  MAHLERL JOACHIM ,  RIEDL EDMUND

IPC: H01L23/13 ,  H01L21/58

Abstract: The invention relates to a semiconductor component (4) with at least one chip (2) and one substrate (7). The chip (2) has a rear side (6) that is connected to a first surface (8) of the substrate (7) by means of diffusion soldering. To this end, recesses (11) are made in the first surface (8) of the substrate (7) whereby having intermetallic phases that are formed during the diffusion soldering. The invention also relates to methods for producing a semiconductor component (4) involving the following steps: coating a rear side (6) of a chip (2) with a soldering metal that is suited for diffusion soldering; manufacturing the substrate (7) with a first surface (8) that is made of a material suited for diffusion soldering; making recesses (11) in the first surface (8) of the substrate (7), and; connecting the rear side (6) of the chip (2) to the first surface (8) of the substrate (7) by diffusion soldering.

公开(公告)号：DE102004058305B3

公开(公告)日：2006-05-18

申请号：DE102004058305

申请日：2004-12-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAHLER JOACHIM ,  OTREMBA RALF ,  BETZ BERND ,  HOSSEINI KHALIL

IPC: H01L23/24 ,  H01L21/52 ,  H01L21/56 ,  H01L23/29

Abstract: A semiconductor component (1) comprises a chip (3) and passive layer (2). The passive layer covers the uppermost conductive structure (4) while leaving the contact interfaces exposed. The passive layer is in immediate adhesive contact with the plastic housing (6). The passive layer is a polymer (7) with embedded mineral-ceramic nano-particles (8). An independent claim is given for a process for manufacturing the semiconductor component.

公开(公告)号：DE102004036905A1

公开(公告)日：2006-03-23

申请号：DE102004036905

申请日：2004-07-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL

IPC: H01L23/13 ,  H01L23/488

Abstract: The invention relates to a vertical power semiconductor component (1) comprising a semiconductor chip (2) provided with a plurality of contact surfaces (4) of a common upper side electrode (30), distributed over the upper side (3). The rear side (7) of the semiconductor chip forms a counter-electrode (29) with a first outer terminal of the power semiconductor component, while the upper side (3) of the semiconductor chip (2) comprises a metal plate (10) as a common upper side electrode (30), that is connected to the contact surfaces in a material fit. The upper side (11) of the metal plate is electrically connected to a second outer terminal of the power semiconductor component by means of bond connections (14).

公开(公告)号：DE102004042104A1

公开(公告)日：2006-03-02

申请号：DE102004042104

申请日：2004-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL

IPC: H01L21/60 ,  H01L23/50

公开(公告)号：DE10208635A1

公开(公告)日：2003-09-18

申请号：DE10208635

申请日：2002-02-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  RIEDL EDMUND MARTIN

IPC: B23K1/00 ,  B23K1/20 ,  B23K35/02 ,  B23K35/14 ,  B23K35/26 ,  B23K35/30 ,  H01L21/60 ,  B23K35/24

公开(公告)号：DE102013109558B4

公开(公告)日：2021-05-12

申请号：DE102013109558

申请日：2013-09-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  MAHLER JOACHIM ,  NIKITIN IVAN ,  OSSOWSKI LUKAS

IPC: H01L23/29 ,  H01L23/42 ,  H01L23/482

Abstract: Integrierter Schaltkreis (270), der Folgendes aufweist:einen Chip (202), aufweisend eine Chiprückseite (216), eine Chipvorderseite (212) und eine Mehrzahl von Chipseitenwänden (206);ein Verkapselungsmaterial (218), das mindestens drei Seiten des Chips (202) bedeckt,wobei die mindestens drei Seiten des Chips (202) mindestens die Chiprückseite (216) und mindestens eine Chipseitenwand (206) der Mehrzahl von Chipseitenwänden (206) aufweisen,wobei eine Seite des Chips, die nicht durch das Verkapselungsmaterial (218) bedeckt ist, eine Chipvorderseite (212) umfasst,wobei ein oder mehrere elektrische Kontakte (217) auf der Chiprückseite (216) und zumindest einer der Chipseitenwände (206) ausgebildet sind,wobei das Verkapselungsmaterial (218) durch ein Klebstoffmaterial (218A) gebildet wird;einen Träger (222), der mittels des Verkapselungsmaterials (218) über der Chiprückseite (216) an dem Chip (202) angehaftet ist, undein elektrisch isolierendes Material (228), das die Chipvorderseite (212) und eine vordere Oberfläche des Verkapselungsmaterials (218) bedeckt,mindestens eine elektrische Zwischenverbindung (232), die von der Chipvorderseite (212) durch das elektrisch isolierende Material (228) zu einer offenliegenden Oberfläche des Integrierten Schaltkreises (270) gebildet wird, wobei die mindestens eine elektrische Zwischenverbindung (232) in elektrischer Verbindung mit dem Chip an der Chipvorderseite (212) steht,wobei das Klebstoffmaterial (218A) dafür konfiguriert ist, den Träger (222) an der Chiprückseite (216) anzuhaften und die Chiprückseite (216) und/oder zumindest eine Chipseitenwand (206) der Mehrzahl von Chipseitenwänden (206) mit dem Träger (222) elektrisch zu verbinden.