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公开(公告)号：KR1019940010925B1
公开(公告)日：1994-11-19
申请号：KR1019910024257
申请日：1991-12-24
Applicant: 한국전자통신연구원
IPC: H01L29/772
Abstract: The method includes the steps of implanting high concentration Si ions into a substrate (4) to define a drain region to form a P type ion implantation region and an insulating film (1), inclined-etching the film (1), drain region, P type region and substrate (4) by using a resist pattern (5) to implant Si ions into the etched substrate to form a source region (6), implanting high concentration Si ions into the tilted substrate to form a channel between the source and drain regions, depositing an insulating layer (8), for isolating between the source and gate, on the source (6) and film (1), inclined-depositing a metallic layer thereon to form a gate for controlling the current of the channel layer, and depositing and thermal-treating an ohmic metallic layer on the source and drain regions, thereby defining the gate length with the etching and metal deposition processes regardless of the lithography process.
Abstract translation: 该方法包括以下步骤：将高浓度Si离子注入到衬底（4）中以限定形成P型离子注入区的漏极区和绝缘膜（1），将膜（1），漏区， P型区域和衬底（4），通过使用抗蚀剂图案（5）将Si离子注入蚀刻的衬底中以形成源极区域（6），将高浓度Si离子注入到倾斜衬底中以在源极和 漏极区域，在源极（6）和膜（1）上沉积用于在源极和栅极之间隔离的绝缘层（8），在其上倾斜沉积金属层以形成用于控制沟道层电流的栅极 ，并且在源极和漏极区域上沉积和热处理欧姆金属层，从而与蚀刻和金属沉积工艺限定栅极长度，而与光刻工艺无关。
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公开(公告)号：KR1019930000228B1
公开(公告)日：1993-01-14
申请号：KR1019890009643
申请日：1989-07-06
Applicant: 한국전자통신연구원
IPC: H01L21/318
Abstract: A heat resistant metallic nitride film on semiconducting substrate is formed by ion beam assisted reaction method, which comprises a deposition of a metallic material by sputtering the metallic target with an ion gun and simultaneously, promotion of a nitriding reaction of deposited heat resistant metals on the substrate by direct irradation of low energy nitrogen ion on the substrate with another ion gun. At least one and/or two metallic elements are selected as target material from high purity W, Mo, Ta, Ti, Zr and WSi. The first ion gun irradates an inert gas ion (e.g. argon (Ar)) on the metallic target and the secondary ion gun irradiates low energy (30-200 eV) nitrogen ion using nitrogen or mixture of nitrogen and inert gas.
Abstract translation: 通过离子束辅助反应法形成半导体基板上的耐热金属氮化物膜，该方法包括通过用离子枪溅射金属靶而沉积金属材料，并同时促进沉积的耐热金属的氮化反应 通过用另一个离子枪在底物上直接照射低能量氮离子的衬底。 从高纯度W，Mo，Ta，Ti，Zr和WSi中选择至少一种和/或两种金属元素作为靶材料。 第一离子枪辐射金属靶上的惰性气体离子（例如氩（Ar）），二次离子枪使用氮气或氮气和惰性气体的混合物照射低能（30-200eV）氮离子。
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Patent Agency Ranking
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公开(公告)号：KR1020140104802A
公开(公告)日：2014-08-29
申请号：KR1020130018756
申请日：2013-02-21
Applicant: 한국전자통신연구원 , 주식회사 시지트로닉스
IPC: H01L23/12
CPC classification number: H01L23/4827 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/0345 , H01L2224/04026 , H01L2224/05138 , H01L2224/05638 , H01L2224/05666 , H01L2224/05671 , H01L2224/2745 , H01L2224/29082 , H01L2224/29083 , H01L2224/29144 , H01L2224/29166 , H01L2224/29171 , H01L2224/32227 , H01L2224/32502 , H01L2224/83447 , H01L2224/83455 , H01L2224/8346 , H01L2224/83805 , H01L2924/01322 , H01L2924/00014 , H01L2924/01026 , H01L2924/01014 , H01L2924/00
Abstract: A method for manufacturing a semiconductor package according to an embodiment of the present invention comprises: preparing a die including a first metal layer and a second metal layer sequentially stacked on a silicon substrate; preparing a package substrate; and forming an adhesive layer between the package substrate and the second metal layer to mount the die to the package substrate, wherein forming the adhesive layer can be performed by the eutectic bonding of the silicon substrate and the second metal layer. The semiconductor package according to the present invention can easily form the adhesive layer due to the eutectic bonding without a forming process of a preform.
Abstract translation: 根据本发明的实施例的半导体封装的制造方法包括：准备包括依次堆叠在硅衬底上的第一金属层和第二金属层的管芯; 制备封装衬底; 以及在所述封装基板和所述第二金属层之间形成粘合剂层以将所述管芯安装到所述封装基板，其中，通过所述硅基板和所述第二金属层的共晶接合可以进行形成所述粘合剂层。 根据本发明的半导体封装可以由于共晶接合而容易地形成粘合层，而不需要预成型件的成形工艺。
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公开(公告)号：KR1020130031761A
公开(公告)日：2013-03-29
申请号：KR1020120000229
申请日：2012-01-02
Applicant: 한국전자통신연구원 , 주식회사 시지트로닉스
IPC: H01L29/772 , H01L21/335
CPC classification number: H01L27/0266 , H01L29/778 , H01L29/7783
Abstract: PURPOSE: A power device is provided to improve the electrical reliability for the EOS/ESD of a GaN FET device. CONSTITUTION: A silicon epitaxial layer(301) is formed on a silicon substrate(300). The silicon epitaxial layer comprises a P-type ion implantation layer(303a,303b) and a p-type plug layer(302). An AlGaN/GaN epi layer(307) for a GaN FET device is formed on the p-type plug layer. A gate electrode(310a), a source electrode(310b) and a drain electrode(310c) are formed on the AlGaN/GaN epi layer.
Abstract translation: 目的：提供一种功率器件来提高GaN FET器件的EOS / ESD的电可靠性。 构成：在硅衬底（300）上形成硅外延层（301）。 硅外延层包括P型离子注入层（303a，303b）和p型插塞层（302）。 在p型插塞层上形成用于GaN FET器件的AlGaN / GaN外延层（307）。 在AlGaN / GaN外延层上形成栅电极（310a），源电极（310b）和漏电极（310c）。
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公开(公告)号：KR1020050064569A
公开(公告)日：2005-06-29
申请号：KR1020030096041
申请日：2003-12-24
Applicant: 한국전자통신연구원
IPC: H01L27/092 , H01L21/8228
Abstract: 본 발명은 응력이 인가된 얇은 실리콘-게르마늄층 및 실리콘 캡층을 포함하는 실리콘/실리콘-게르마늄/실리콘 시모스(CMOS) 소자에 관한 것으로, n-채널 소자와 p-채널 소자의 실리콘 캡층이 서로 다른 두께로 형성된다. p-채널 소자의 실리콘 캡층을 얇게 형성하여 유효 게이트-절연막 캐패시턴스를 감소시키는 동시에 절연막 계면에서의 기생 채널 형성이 최소화되도록 하고, n-채널 소자의 실리콘 캡층을 두껍게 형성하여 대부분의 채널이 실리콘 캡층에 형성되도록 하므로써 두 소자의 전자 이동도 및 전기적 특성이 향상될 수 있다.
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