公开(公告)号：KR1020080021392A

公开(公告)日：2008-03-07

申请号：KR1020060084758

申请日：2006-09-04

Applicant: 삼성전자주식회사

Inventor： 이윤희 ,  최삼종 ,  조규철 ,  강태수 ,  박영수 ,  김연숙

IPC: H01L23/544

CPC classification number: H01L23/544 ,  H01L21/67282 ,  H01L2223/54413 ,  H01L2223/54493

Abstract: A semiconductor wafer with an identification part is provided to prevent residues from remaining on an identification part by including an identification part located in a position from the outer circumference of a semiconductor wafer to a position not deeper than the depth of a notch wherein the identification part is adjacent to the notch. A notch(110) is formed of an empty space positioned at one part of the edge of a body(102) of a flat plate, having a predetermined depth(D) facing toward the center of the body. An identification part(120) is formed in the surface of the body adjacent to the notch, located in a distance from the outer circumference of the body to a position not deeper than the depth of the notch. The notch can be an open space of a V shape, having first and second sides(112,114) confronting each other.

Abstract translation: 提供了具有识别部件的半导体晶片，通过将位于半导体晶片的外周的位置的识别部位设置在不比凹口的深度更深的位置上，将识别部件残留在识别部上， 与凹口相邻。 凹口（110）由位于平板的本体（102）的边缘的一部分处的空的空间形成，具有面向主体中心的预定深度（D）。 识别部分（120）形成在与凹口相邻的主体的表面中，所述凹口位于距离主体的外周一定距离至不比切口的深度更深的位置。 凹口可以是具有彼此面对的第一和第二侧面（112,114）的V形开放空间。

公开(公告)号：KR1020050006720A

公开(公告)日：2005-01-17

申请号：KR1020030046646

申请日：2003-07-10

Applicant: 삼성전자주식회사

Inventor： 한신혁 ,  조규철 ,  최삼종 ,  김연숙 ,  전태훈

IPC: H01L21/68

Abstract: PURPOSE: An apparatus for gripping a wafer is provided to reduce contamination of a wafer by reducing wafer damage caused by separation of the wafer through a more stable grip and by decreasing the number of grip pins. CONSTITUTION: A notch grip pin(204c) has a width smaller than the entrance of the notch(202) of a wafer(200), including a notch contact part for coming in contact with the inner surface of the notch. At least one edge grip pin(206a) comes in contact with the edge of the wafer. The notch grip pin and the edge grip pin are attached to a distance control unit that controls the distance between the notch grip pin and the edge grip pin.

Abstract translation: 目的：提供一种用于夹持晶片的装置，通过减少由更稳定的把手分离晶片而造成的晶片损坏，以及通过减少夹紧销的数量来减少晶片的污染。 构成：凹口夹紧销（204c）的宽度小于晶片（200）的凹口（202）的入口的宽度，包括用于与凹口的内表面接触的切口接触部分。 至少一个边缘夹持销（206a）与晶片的边缘接触。 凹口夹紧销和边缘抓持销连接到距离控制单元，该距离控制单元控制凹口夹紧销和边缘夹紧销之间的距离。

公开(公告)号：KR1020040065587A

公开(公告)日：2004-07-23

申请号：KR1020030002586

申请日：2003-01-15

Applicant: 삼성전자주식회사

Inventor： 김연숙 ,  조규철 ,  한신혁 ,  최삼종

IPC: H01L21/304

Abstract: PURPOSE: A wafer polishing apparatus is provided to polish simultaneously an upper side, a lower side, and a lateral part of a wafer by using only one wafer polishing device. CONSTITUTION: A wafer polishing apparatus includes a lower polishing table, an upper polishing table, and a plurality of edge polishing blocks. The lower polishing table(120) includes a lower polishing pad(122) to polish a lower side of a wafer. The upper polishing table(110) includes an upper polishing pad(112) to polish an upper side of the wafer. The edge polishing blocks(130) include plural edge polishing pads in order to polish a lateral part of the wafer. The edge polishing blocks are close to the lateral part of the wafer when the upper side and the lower side of the wafer are polished by the upper and the lower polishing tables. The upper side and the lower side of the wafer are close to the upper side and the lower side of the wafer when the lateral part of the wafer is polished by the edge polishing blocks.

Abstract translation: 目的：提供晶片抛光装置，通过仅使用一个晶片抛光装置同时抛光晶片的上侧，下侧和侧面部分。 构成：晶片抛光装置包括下抛光台，上抛光台和多个边缘抛光块。 下抛光台（120）包括用于抛光晶片下侧的下抛光垫（122）。 上抛光台（110）包括用于抛光晶片上侧的上抛光垫（112）。 边缘抛光块（130）包括多个边缘抛光垫，以便抛光晶片的侧面部分。 当晶片的上侧和下侧通过上下抛光台抛光时，边缘抛光块靠近晶片的侧部。 当晶片的侧面部分被边缘抛光块抛光时，晶片的上侧和下侧靠近晶片的上侧和下侧。

公开(公告)号：KR1020030059640A

公开(公告)日：2003-07-10

申请号：KR1020020000238

申请日：2002-01-03

Applicant: 삼성전자주식회사

Inventor： 한신혁 ,  조규철 ,  허태열 ,  최삼종 ,  김연숙 ,  박준석 ,  김기정 ,  최수열

IPC: H01L21/68

Abstract: PURPOSE: A manual tweezer is provided to be capable of stably holding a wafer though the diameter of the wafer is large by supporting the wafer at three contact points. CONSTITUTION: A manual tweezer(30) is capable of supporting a wafer(10) at three contact points of the peripheral portion of the wafer. Preferably, the body structure of the manual tweezer is entirely shaped into an alphabet 'Y'. At this time, the body structure of the manual tweezer is divided into a trunk part(32) and a pair of branch parts(35). Preferably, a plurality of grips(34,36) are installed at the center point of the trunk part and at each end point of the branch parts for stably holding the wafer. Preferably, the each grip installed at the branch parts is fixed and the grip installed at the trunk part is capable of being controlled. Preferably, the manual tweezer is made of Teflon except the handle part(33).

Abstract translation: 目的：提供手动镊子，通过在三个接触点处支撑晶片，通过晶片的直径大，能够稳定地保持晶片。 构成：手动镊子（30）能够在晶片的周边部分的三个接触点处支撑晶片（10）。 优选地，手动镊子的身体结构完全成形为字母“Y”。 此时，手动镊子的身体结构被分成躯干部分（32）和一对分支部分（35）。 优选地，多个夹具（34,36）安装在主体部分的中心点处并且在分支部件的每个端部处，以稳定地保持晶片。 优选地，安装在分支部分处的每个把手是固定的，并且能够控制安装在躯干部分的把手。 优选地，除了手柄部分（33）之外，手动镊子由特氟隆制成。

公开(公告)号：KR100506814B1

公开(公告)日：2005-08-09

申请号：KR1020030002586

申请日：2003-01-15

Applicant: 삼성전자주식회사

Inventor： 김연숙 ,  조규철 ,  한신혁 ,  최삼종

IPC: H01L21/304

Abstract: 웨이퍼의 표면을 연마하기 위한 장치에 있어서, 웨이퍼는 상부 연마 테이블과 하부 연마 테이블 사이에 개재되며, 다수의 에지 연마 블록은 웨이퍼의 측면과 마주보도록 배치된다. 에지 연마 블록에는 웨이퍼 측면의 형상 프로파일을 균일하게 하기 위한 원형 그루브가 형성되어 있다. 웨이퍼의 측면 연마 공정을 수행하는 동안 웨이퍼는 상부 연마 테이블 및 하부 연마 테이블에 밀착되어 지지되며, 웨이퍼의 측면은 다수의 에지 연마 블록의 회전에 의해 연마된다. 웨이퍼의 전면 및 이면을 연마하는 공정을 수행하는 동안 웨이퍼는 다수의 에지 연마 블록에 밀착되어 지지되며, 웨이퍼의 전면 및 이면은 상부 및 하부 연마 테이블의 회전에 의해 연마된다. 따라서, 웨이퍼의 전면, 이면 및 측면에 대한 연마 공정이 하나의 연마 장치에 의해 수행될 수 있으며, 균일한 웨이퍼 측면의 형상 프로파일을 얻을 수 있다.

公开(公告)号：KR1020070117748A

公开(公告)日：2007-12-13

申请号：KR1020060051763

申请日：2006-06-09

Applicant: 삼성전자주식회사

Inventor： 최삼종 ,  강태수 ,  박영수 ,  김연숙 ,  이윤희 ,  조규철

IPC: H01L21/304

Abstract: A CVD(chemical vapor deposition) apparatus is provided to identically or similarly polish the center and edge of a wafer by including a plate in which the cushion applied to a polishing pad corresponding to the edge of the wafer is smaller than the cushion applied a polishing pad corresponding to the center of the wafer. A polishing head(112) pressurizes and rotates the back surface of a wafer. A polishing pad(114) polishes the front surface of the wafer, confronting the polishing head. A plate(116) rotates in the same/opposite direction as/to the polishing head. The cushion of the polishing pad applied to the center and edge of the wafer is different in the plate so that the center and edge of the wafer positioned on the polishing pad are polished identically or similarly. The plate includes a hard part and a soft part surrounding the hard part. In the hard part, the polishing pad corresponding to the center of the wafer has a predetermined compression strength or higher. In the soft part, the polishing pad corresponding to the edge of the wafer has lower compression strength than that of the hard part.

Abstract translation: 提供CVD（化学气相沉积）设备以通过包括一个板来对晶片的中心和边缘进行相同或相似的抛光，其中施加到与晶片边缘相对应的抛光垫的衬垫小于衬垫施加的抛光 垫对应于晶片的中心。 抛光头（112）对晶片的背面进行加压和旋转。 抛光垫（114）抛光晶片的前表面，面对抛光头。 板（116）沿与抛光头相同/相反的方向旋转。 施加到晶片的中心和边缘的抛光垫的衬垫在板中是不同的，使得位于抛光垫上的晶片的中心和边缘被相同地或类似地抛光。 该板包括硬质部分和围绕硬质部分的软质部分。 在硬质部分中，与晶片中心对应的抛光垫具有预定的压缩强度或更高的压缩强度。 在软部分中，与晶片边缘相对应的抛光垫具有比硬部分低的压缩强度。

公开(公告)号：KR1020070070485A

公开(公告)日：2007-07-04

申请号：KR1020050133097

申请日：2005-12-29

Applicant: 삼성전자주식회사

Inventor： 김연숙 ,  조규철 ,  김희성 ,  한신혁

IPC: H01L21/66

CPC classification number: H01L22/12 ,  G01N21/8851 ,  G01N21/94 ,  G01N21/9501 ,  G01N2021/8854 ,  G01N2021/945

Abstract: A method for detecting a local defect of a wafer is provided to classify the number of defects generated in each unit inspection region in detail according to kinds of the defects. A wafer to be inspected is divided into plural portions of a predetermined size to form unit inspection regions(S12). The number of defects generated in each unit inspection region is measured(S16). If the number of the defects in each unit inspection region exceeds a predetermined range(S18), the wafer is decided as a defective(S20). The defect generated in the unit inspection region comprises scratch, cluster and particles.

Abstract translation: 提供了一种用于检测晶片的局部缺陷的方法，以根据缺陷的种类对每个单元检查区域中产生的缺陷的数量进行详细分类。 待检查的晶片被分成预定尺寸的多个部分以形成单元检查区域（S12）。 测量在每个单元检查区域中产生的缺陷的数量（S16）。 如果每个单位检查区域中的缺陷数超过预定范围（S18），则将晶片判定为缺陷（S20）。 在单元检查区域中产生的缺陷包括划痕，簇和颗粒。

公开(公告)号：KR100476933B1

公开(公告)日：2005-03-16

申请号：KR1020020061718

申请日：2002-10-10

Applicant: 삼성전자주식회사

Inventor： 최삼종 ,  김기정 ,  조규철 ,  김연숙 ,  한신혁 ,  정회식

IPC: H01L21/00

CPC classification number: H01L23/544 ,  H01L29/0657 ,  H01L2223/54406 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

Abstract: 식별 표시를 갖는 반도체 웨이퍼를 제공한다. 이 반도체 웨이퍼는 웨이퍼 식별 표시가 기록되는 마킹 영역을 구비하고, 그 측면은 상부 측면 및 하부 측면으로 구분된다. 이때, 하부 측면에는 상부 측면보다 넓은 폭을 갖는 넓은 영역이 배치되고, 상기 마킹 영역은 상기 넓은 영역에 배치되는 것을 특징으로 한다. 이를 위해, 반도체 웨이퍼의 단면은 비대칭적 모양, 즉 넓은 영역은 상부 측면보다 폭은 넓고 두께는 두껍다.

公开(公告)号：KR1020040032529A

公开(公告)日：2004-04-17

申请号：KR1020020061718

申请日：2002-10-10

Applicant: 삼성전자주식회사

Inventor： 최삼종 ,  김기정 ,  조규철 ,  김연숙 ,  한신혁 ,  정회식

IPC: H01L21/00

CPC classification number: H01L23/544 ,  H01L29/0657 ,  H01L2223/54406 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PURPOSE: A semiconductor wafer having an identification indication is provided to be capable of effectively using the surface area of the semiconductor wafer and minimizing the particle failure due to the non-uniform shape of the identification indication. CONSTITUTION: A semiconductor wafer includes a marking region(200) for forming a wafer identification indication(300). A lower side(124) has a larger surface area than that of the upper side(122). The marking region is located at the lower side. Preferably, the sectional surface of the semiconductor wafer is asymmetrically formed. Preferably, the lower side has a larger thickness than that of the upper side. Preferably, the lower side is formed on the whole peripheral portion of the semiconductor wafer.

Abstract translation: 目的：提供具有识别指示的半导体晶片，以能够有效地使用半导体晶片的表面积，并且由于识别指示的不均匀形状使粒子失效最小化。 构成：半导体晶片包括用于形成晶片识别指示（300）的标记区域（200）。 下侧（124）具有比上侧（122）更大的表面积。 标记区域位于下侧。 优选地，半导体晶片的截面不对称地形成。 优选地，下侧具有比上侧更大的厚度。 优选地，下侧形成在半导体晶片的整个周边部分上。

公开(公告)号：KR1020030059633A

公开(公告)日：2003-07-10

申请号：KR1020020000231

申请日：2002-01-03

Applicant: 삼성전자주식회사

Inventor： 최삼종 ,  조규철 ,  윤상웅 ,  김연숙 ,  한신혁

IPC: H01L21/027

Abstract: PURPOSE: A heat plate for heating a wafer is provided to be capable of securing the uniformity of heat distributed at the wafer by forming an additional heat coil at the center and peripheral portion of the heat plate, respectively. CONSTITUTION: A heat plate(40') for heating a wafer is provided with a plurality of closed loop type heat coils(61,62,63) having different diameters. At this time, the second closed loop type heat coil(62) has a diameter larger than that of the first closed loop type heat coil(61). At the time, the third closed loop type heat coil(63) has a diameter larger than that of the second closed loop type heat coil(62). Preferably, a plurality of connecting screws capable of controlling the distance between the center portion of the heat plate and each heat coil, are installed corresponding to each heat coil.

Abstract translation: 目的：提供用于加热晶片的加热板，以便能够通过在加热板的中心和周边部分处形成额外的热线圈来确保分布在晶片上的热量的均匀性。 构成：用于加热晶片的加热板（40'）设置有具有不同直径的多个闭环型热线圈（61,62,63）。 此时，第二闭环式热线圈（62）的直径大于第一闭环式热线圈（61）的直径。 此时，第三闭环式热线圈（63）的直径大于第二闭环式热线圈（62）的直径。 优选地，对应于每个热线圈安装能够控制加热板的中心部分和每个热线圈之间的距离的多个连接螺钉。